UART 频率设置
Divider value when the Uart clock source is selected as FCLK/n.’n’ is determined by UCON0, UCON1, UCON2.
UCON2 is FCLK/n Clock Enable/Disable bit.
For setting ‘n’ from 7 to 21, use UCON0,
For setting ‘n’ from 22 to 36, use UCON1,
For setting ‘n’ from 37 to 43, use UCON2,
UCON2: 0 = Disable FCLK/n clock. 1 = Enable FCLK/n clock.
In case of UCON0,
UART clock = FCLK / (divider+6), where divider>0.
！！！（1）UCON1, UCON2 must be zero.
ex) 1: UART clock = FCLK/7, 2: UART clock = FCLK/8
3: UART clock = FCLK/9, … , 15: UART clock = FCLK/21
In case of UCON1,
UART clock = FCLK / (divider+21), where divider>0.
！！！（2）UCON0, UCON2 must be zero.
ex) 1: UART clock = FCLK/22, 2: UART clock = FCLK/23
3: UART clock = FCLK/24, … , 15: UART clock = FCLK/36
In case of UCON2,
UART clock = FCLK / (divider+36), where divider>0.
UCON0, UCON1 must be zero.
ex) 1: UART clock = FCLK/37, 2: UART clock = FCLK/38
3: UART clock = FCLK/39, … , 7: UART clock = FCLK/43
！！！（3）If UCON00/1 and UCON2 are all ‘0’, the divider will be
！！！（3）44, that is UART clock =FCLK/44
！！！（3）Total division range is from 7 to 44.
想问一下 （1）第一处的问题 UCON1, UCON2 must be zero. ？到底是 UCON1 UCON2为0 吗？
（3） 1. UCON00/1？？？ 是要表示 UCON0的意思吗？2. 是不是只要满足If UCON00/1 and UCON2 are all ‘0’ 的时候不管其它不管怎么设置都是FCLK/44
(4):在裸奔3的代码中init_uart 中 ，UCON 0/1/2 =0x245那么UART 的使能 UCON2=0莫非URAT无源可以工作？ 1# 落叶
想问一下 （1）第一处的问题 UCON1, UCON2 must be zero. ？到底是 UCON1 UCON2为0 吗？
答： 是的，这些位都是0
（3） 1. UCON00/1？？？ 是要表示 UCON0的意思吗？2. 是不是只要满足If UCON00/1 and UCON2 are all ‘0’ 的时候不管其它不管怎么设置都是FCLK/44
答：是的，如果波特率的始终源是 FCLK/n ,而且这些位都是0 ，那么n =44
(4):在裸奔3的代码中init_uart 中 ，UCON 0/1/2 =0x245那么UART 的使能 UCON2=0莫非URAT无源可以工作？
答：UART的波特率时钟源有三种：PCLK,，FCLK/n 或者 UEXTCLK (外部时钟).
这里用的是 PCLK 1. UCON00/1 你不觉的这里好像有点问题？ 是不是这样的 UCON0/1
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