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TQ3358核心板的NANDFlash太小

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lipyxj 发表于 2013-4-26 12:58:34 | 显示全部楼层 |阅读模式
TQ3358核心板自带的NANDFLASH为256MByte,太小,我想更换为1GByte的K9K8G08U0M,是否可以直接更换?更换后需要修改那些代码?
亚瑟王 发表于 2013-4-26 18:07:21 | 显示全部楼层
驱动没啥限制,可以试一下。
 楼主| lipyxj 发表于 2013-5-2 01:09:28 | 显示全部楼层
亚瑟王 发表于 2013-4-26 18:07
驱动没啥限制,可以试一下。

我换了一块K9K8G08U0A上去,u-boot检测不到NandFlash,在LCD上显示NAND:0MB,SecureCRT中提示“No NAND device found!!!”,我该检查哪里呀?
亚瑟王 发表于 2013-5-2 09:26:52 | 显示全部楼层
lipyxj 发表于 2013-5-2 01:09
我换了一块K9K8G08U0A上去,u-boot检测不到NandFlash,在LCD上显示NAND:0MB,SecureCRT中提示“No NAND  ...

查看一下uboot和内核的Nand驱动部分,看是否有对Nand的ID的限制。K9K8G08和K9G2G08的差别就是ID号的变化。
 楼主| lipyxj 发表于 2013-5-2 12:29:16 | 显示全部楼层
亚瑟王 发表于 2013-5-2 09:26
查看一下uboot和内核的Nand驱动部分,看是否有对Nand的ID的限制。K9K8G08和K9G2G08的差别就是ID号的变化。 ...

在下面的结构中有K9K8G08的ID呀,红色部分

const struct nand_flash_dev nand_flash_ids[] = {

#ifdef CONFIG_MTD_NAND_MUSEUM_IDS
        {"NAND 1MiB 5V 8-bit",                0x6e, 256, 1, 0x1000, 0},
        {"NAND 2MiB 5V 8-bit",                0x64, 256, 2, 0x1000, 0},
        {"NAND 4MiB 5V 8-bit",                0x6b, 512, 4, 0x2000, 0},
        {"NAND 1MiB 3,3V 8-bit",        0xe8, 256, 1, 0x1000, 0},
        {"NAND 1MiB 3,3V 8-bit",        0xec, 256, 1, 0x1000, 0},
        {"NAND 2MiB 3,3V 8-bit",        0xea, 256, 2, 0x1000, 0},
        {"NAND 4MiB 3,3V 8-bit",         0xd5, 512, 4, 0x2000, 0},
        {"NAND 4MiB 3,3V 8-bit",        0xe3, 512, 4, 0x2000, 0},
        {"NAND 4MiB 3,3V 8-bit",        0xe5, 512, 4, 0x2000, 0},
        {"NAND 8MiB 3,3V 8-bit",        0xd6, 512, 8, 0x2000, 0},

        {"NAND 8MiB 1,8V 8-bit",        0x39, 512, 8, 0x2000, 0},
        {"NAND 8MiB 3,3V 8-bit",        0xe6, 512, 8, 0x2000, 0},
        {"NAND 8MiB 1,8V 16-bit",        0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16},
        {"NAND 8MiB 3,3V 16-bit",        0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16},
#endif

        {"NAND 16MiB 1,8V 8-bit",        0x33, 512, 16, 0x4000, 0},
        {"NAND 16MiB 3,3V 8-bit",        0x73, 512, 16, 0x4000, 0},
        {"NAND 16MiB 1,8V 16-bit",        0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16},
        {"NAND 16MiB 3,3V 16-bit",        0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16},

        {"NAND 32MiB 1,8V 8-bit",        0x35, 512, 32, 0x4000, 0},
        {"NAND 32MiB 3,3V 8-bit",        0x75, 512, 32, 0x4000, 0},
        {"NAND 32MiB 1,8V 16-bit",        0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16},
        {"NAND 32MiB 3,3V 16-bit",        0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16},

        {"NAND 64MiB 1,8V 8-bit",        0x36, 512, 64, 0x4000, 0},
        {"NAND 64MiB 3,3V 8-bit",        0x76, 512, 64, 0x4000, 0},
        {"NAND 64MiB 1,8V 16-bit",        0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16},
        {"NAND 64MiB 3,3V 16-bit",        0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16},

        {"NAND 128MiB 1,8V 8-bit",        0x78, 512, 128, 0x4000, 0},
        {"NAND 128MiB 1,8V 8-bit",        0x39, 512, 128, 0x4000, 0},
        {"NAND 128MiB 3,3V 8-bit",        0x79, 512, 128, 0x4000, 0},
        {"NAND 128MiB 1,8V 16-bit",        0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16},
        {"NAND 128MiB 1,8V 16-bit",        0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16},
        {"NAND 128MiB 3,3V 16-bit",        0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16},
        {"NAND 128MiB 3,3V 16-bit",        0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16},

        {"NAND 256MiB 3,3V 8-bit",        0x71, 512, 256, 0x4000, 0},

        /*
         * These are the new chips with large page size. The pagesize and the
         * erasesize is determined from the extended id bytes
         */
#define LP_OPTIONS (NAND_SAMSUNG_LP_OPTIONS | NAND_NO_READRDY | NAND_NO_AUTOINCR)
#define LP_OPTIONS16 (LP_OPTIONS | NAND_BUSWIDTH_16)

        /*512 Megabit */
        {"NAND 64MiB 1,8V 8-bit",        0xA2, 0,  64, 0, LP_OPTIONS},
        {"NAND 64MiB 3,3V 8-bit",        0xF2, 0,  64, 0, LP_OPTIONS},
        {"NAND 64MiB 1,8V 16-bit",        0xB2, 0,  64, 0, LP_OPTIONS16},
        {"NAND 64MiB 3,3V 16-bit",        0xC2, 0,  64, 0, LP_OPTIONS16},

        /* 1 Gigabit */
        {"NAND 128MiB 1,8V 8-bit",        0xA1, 0, 128, 0, LP_OPTIONS},
        {"NAND 128MiB 3,3V 8-bit",        0xF1, 0, 128, 0, LP_OPTIONS},
        {"NAND 128MiB 3,3V 8-bit",        0xD1, 0, 128, 0, LP_OPTIONS},
        {"NAND 128MiB 1,8V 16-bit",        0xB1, 0, 128, 0, LP_OPTIONS16},
        {"NAND 128MiB 3,3V 16-bit",        0xC1, 0, 128, 0, LP_OPTIONS16},

        /* 2 Gigabit */
        {"NAND 256MiB 1,8V 8-bit",        0xAA, 0, 256, 0, LP_OPTIONS},
        {"NAND 256MiB 3,3V 8-bit",        0xDA, 0, 256, 0, LP_OPTIONS},
        {"NAND 256MiB 1,8V 16-bit",        0xBA, 0, 256, 0, LP_OPTIONS16},
        {"NAND 256MiB 3,3V 16-bit",        0xCA, 0, 256, 0, LP_OPTIONS16},

        /* 4 Gigabit */
        {"NAND 512MiB 1,8V 8-bit",        0xAC, 0, 512, 0, LP_OPTIONS},
        {"NAND 512MiB 3,3V 8-bit",        0xDC, 0, 512, 0, LP_OPTIONS},
        {"NAND 512MiB 1,8V 16-bit",        0xBC, 0, 512, 0, LP_OPTIONS16},
        {"NAND 512MiB 3,3V 16-bit",        0xCC, 0, 512, 0, LP_OPTIONS16},

        /* 8 Gigabit */
        {"NAND 1GiB 1,8V 8-bit",        0xA3, 0, 1024, 0, LP_OPTIONS},
        {"NAND 1GiB 3,3V 8-bit",        0xD3, 0, 1024, 0, LP_OPTIONS},        {"NAND 1GiB 1,8V 16-bit",        0xB3, 0, 1024, 0, LP_OPTIONS16},
        {"NAND 1GiB 3,3V 16-bit",        0xC3, 0, 1024, 0, LP_OPTIONS16},

        /* 16 Gigabit */
        {"NAND 2GiB 1,8V 8-bit",        0xA5, 0, 2048, 0, LP_OPTIONS},
        {"NAND 2GiB 3,3V 8-bit",        0xD5, 0, 2048, 0, LP_OPTIONS},
        {"NAND 2GiB 1,8V 16-bit",        0xB5, 0, 2048, 0, LP_OPTIONS16},
        {"NAND 2GiB 3,3V 16-bit",        0xC5, 0, 2048, 0, LP_OPTIONS16},

        /*
         * Renesas AND 1 Gigabit. Those chips do not support extended id and
         * have a strange page/block layout !  The chosen minimum erasesize is
         * 4 * 2 * 2048 = 16384 Byte, as those chips have an array of 4 page
         * planes 1 block = 2 pages, but due to plane arrangement the blocks
         * 0-3 consists of page 0 + 4,1 + 5, 2 + 6, 3 + 7 Anyway JFFS2 would
         * increase the eraseblock size so we chose a combined one which can be
         * erased in one go There are more speed improvements for reads and
         * writes possible, but not implemented now
         */
        {"AND 128MiB 3,3V 8-bit",        0x01, 2048, 128, 0x4000,
         NAND_IS_AND | NAND_NO_AUTOINCR |NAND_NO_READRDY | NAND_4PAGE_ARRAY |
         BBT_AUTO_REFRESH
        },

        {NULL,}
};
 楼主| lipyxj 发表于 2013-5-2 23:04:18 | 显示全部楼层
lipyxj 发表于 2013-5-2 12:29
在下面的结构中有K9K8G08的ID呀,红色部分

const struct nand_flash_dev nand_flash_ids[] = {

经过测试是在static const struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
                                                  struct nand_chip *chip,
                                                  int busw,
                                                  int *maf_id, int *dev_id,
                                                  const struct nand_flash_dev *type)
读flash_type时,读取的maf_id,dev_id都是0,所以找不到flash
亚瑟王 发表于 2013-5-3 10:59:45 | 显示全部楼层
lipyxj 发表于 2013-5-2 23:04
经过测试是在static const struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
                                                  ...

亲,那你需要向下追查代码了。K9K8G08和K9F2G08的结构是相同的。指令集也是相同,不同的是ID好。
 楼主| lipyxj 发表于 2013-5-3 16:03:11 | 显示全部楼层
亚瑟王 发表于 2013-5-3 10:59
亲,那你需要向下追查代码了。K9K8G08和K9F2G08的结构是相同的。指令集也是相同,不同的是ID好。

我是在追查代码了,能否给一个TQ3358 u-boot 的NAND FLASH驱动所涉及的文件列表?或nandflash驱动的流程图?这样的话会快一些
亚瑟王 发表于 2013-5-3 17:33:44 | 显示全部楼层
lipyxj 发表于 2013-5-3 16:03
我是在追查代码了,能否给一个TQ3358 u-boot 的NAND FLASH驱动所涉及的文件列表?或nandflash驱动的流程图 ...

亲,重点看:drivers/mtd/nand/下的代码。
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