am335x的网卡相关资料

其他网站看到的am335x的网卡移植参考程序，供大家参考。

1. http://www.deyisupport.com/question_answer/dsp_arm/sitara_arm/f/25/t/46117.aspx
   
2. /*
   
3. * Code for AM335X EVM.
   
4. *
   
5. * Copyright (C) 2011 Texas Instruments, Inc. - http://www.ti.com/
   
6. *
   
7. * This program is free software; you can redistribute it and/or
   
8. * modify it under the terms of the GNU General Public License as
   
9. * published by the Free Software Foundation version 2.
   
10. *
    
11. * This program is distributed "as is" WITHOUT ANY WARRANTY ofany
    
12. * kind, whether express or implied; without even the implied warranty
    
13. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    
14. * GNU General Public License for more details.
    
15. */
    
16. #include <linux/kernel.h>
    
17. #include <linux/init.h>
    
18. #include <linux/i2c.h>
    
19. #include <linux/module.h>
    
20. #include <linux/i2c/at24.h>
    
21. #include <linux/phy.h>
    
22. #include <linux/gpio.h>
    
23. #include <linux/spi/spi.h>
    
24. #include <linux/spi/flash.h>
    
25. #include <linux/gpio_keys.h>
    
26. #include <linux/input.h>
    
27. #include <linux/input/matrix_keypad.h>
    
28. #include <linux/mtd/mtd.h>
    
29. #include <linux/mtd/nand.h>
    
30. #include <linux/mtd/partitions.h>
    
31. #include <linux/platform_device.h>
    
32. #include <linux/clk.h>
    
33. #include <linux/err.h>
    
34. #include <linux/export.h>
    
35. #include <linux/wl12xx.h>
    
36. #include <linux/ethtool.h>
    
37. #include <linux/mfd/tps65910.h>
    
38. #include <linux/mfd/tps65217.h>
    
39. #include <linux/pwm_backlight.h>
    
40. #include <linux/input/ti_tsc.h>
    
41. #include <linux/platform_data/ti_adc.h>
    
42. #include <linux/mfd/ti_tscadc.h>
    
43. #include <linux/reboot.h>
    
44. #include <linux/pwm/pwm.h>
    
45. #include <linux/rtc/rtc-omap.h>
    
46. #include <linux/opp.h>
    
47. /* LCDcontroller is similar to DA850 */
    
48. #include <video/da8xx-fb.h>
    
49. #include<mach/hardware.h>
    
50. #include <mach/board-am335xevm.h>
    
51. #include<asm/mach-types.h>
    
52. #include <asm/mach/arch.h>
    
53. #include <asm/mach/map.h>
    
54. #include <asm/hardware/asp.h>
    
55. #include<plat/omap_device.h>
    
56. #include <plat/omap-pm.h>
    
57. #include <plat/irqs.h>
    
58. #include <plat/board.h>
    
59. #include <plat/common.h>
    
60. #include <plat/lcdc.h>
    
61. #include <plat/usb.h>
    
62. #include <plat/mmc.h>
    
63. #include <plat/emif.h>
    
64. #include <plat/nand.h>
    
65. #include"board-flash.h"
    
66. #include "cpuidle33xx.h"
    
67. #include "mux.h"
    
68. #include "devices.h"
    
69. #include "hsmmc.h"
    
70. /* ConvertGPIO signal to GPIO pin number */
    
71. #define GPIO_TO_PIN(bank, gpio) (32 * (bank) + (gpio))
    
72. /* BBB PHYIDs */
    
73. #define BBB_PHY_ID  0x7c0f1
    
74. #define BBB_PHY_MASK  0xfffffffe
    
75. /* AM335X EVMPhy ID and Debug Registers */
    
76. #define AM335X_EVM_PHY_ID  0x4dd074
    
77. #define AM335X_EVM_PHY_MASK  0xfffffffe
    
78. #define AR8051_PHY_DEBUG_ADDR_REG 0x1d
    
79. #define AR8051_PHY_DEBUG_DATA_REG 0x1e
    
80. #define AR8051_DEBUG_RGMII_CLK_DLY_REG 0x5
    
81. #define AR8051_RGMII_TX_CLK_DLY  BIT(8)
    
82. /*
    
83. #define CONFIG_DH_320_240         1
    
84. #define CONFIG_DH_480_272         2
    
85. #define CONFIG_DH_800_480         3
    
86. #define CONFIG_DH_800_600         4*/
    
87. static const struct display_panel disp_panel = {
    
88. WVGA,
    
89. 32,
    
90. 16,//32, --czx
    
91. COLOR_ACTIVE,
    
92. };
    
93. /* LCDbacklight platform Data */
    
94. #defineAM335X_BACKLIGHT_MAX_BRIGHTNESS        100
    
95. #define AM335X_BACKLIGHT_DEFAULT_BRIGHTNESS    100
    
96. #defineAM335X_PWM_PERIOD_NANO_SECONDS        (5000* 10)
    
97. static structplatform_pwm_backlight_data am335x_backlight_data0 = {
    
98. .pwm_id         ="ecap.0",
    
99. .ch            = -1,
    
100. .lth_brightness = 21,
     
101. .max_brightness = AM335X_BACKLIGHT_MAX_BRIGHTNESS,
     
102. .dft_brightness = AM335X_BACKLIGHT_DEFAULT_BRIGHTNESS,
     
103. .pwm_period_ns  = AM335X_PWM_PERIOD_NANO_SECONDS,
     
104. };
     
105. static structplatform_pwm_backlight_data am335x_backlight_data2 = {
     
106. .pwm_id         ="ecap.2",
     
107. .ch            = -1,
     
108. .lth_brightness = 21,
     
109. .max_brightness = AM335X_BACKLIGHT_MAX_BRIGHTNESS,
     
110. .dft_brightness = AM335X_BACKLIGHT_DEFAULT_BRIGHTNESS,
     
111. .pwm_period_ns  = AM335X_PWM_PERIOD_NANO_SECONDS,
     
112. };
     
113. static structlcd_ctrl_config lcd_cfg = {
     
114. //#if defined(CONFIG_DH_320_240)||(CONFIG_DH_480_272)||(CONFIG_DH_800_480)||(CONFIG_DH_800_600)
     
115. /*&disp_panel,
     
116. .ac_bias  = 255,
     
117. .ac_bias_intrpt  = 0,
     
118. .dma_burst_sz  = 16,
     
119. .bpp   = 16,//32,--czx
     
120. .fdd   = 0x80,
     
121. .tft_alt_mode  = 0,
     
122. .stn_565_mode  = 0,
     
123. .mono_8bit_mode  = 0,
     
124. .invert_line_clock = 1,
     
125. .invert_frm_clock = 1,
     
126. .sync_edge  = 0,
     
127. .sync_ctrl  = 1,
     
128. .raster_order  = 0,*/
     
129. //#elif defined CONFIG_VGA
     
130.         &disp_panel,
     
131. .ac_bias  = 255,
     
132. .ac_bias_intrpt  = 0,
     
133. .dma_burst_sz  = 16,
     
134. .bpp   = 16,//32,--czx
     
135. .fdd   = 0x80,
     
136. .tft_alt_mode  = 0,
     
137. .stn_565_mode  = 0,
     
138. .mono_8bit_mode  = 0,
     
139. .invert_line_clock = 1,
     
140. .invert_frm_clock = 1,
     
141. .sync_edge  = 0,
     
142. .sync_ctrl  = 1,
     
143. .raster_order  = 0,
     
144. //#endif
     
145. };
     
146. structda8xx_lcdc_platform_data TFC_S9700RTWV35TR_01B_pdata = {
     
147. .manu_name  = "ThreeFive",
     
148. .controller_data = &lcd_cfg,
     
149. .type   = "TFC_S9700RTWV35TR_01B",
     
150. };
     
151. structda8xx_lcdc_platform_data  NHD_480272MF_ATXI_pdata = {
     
152. .manu_name             = "NHD",
     
153. .controller_data        =&lcd_cfg,
     
154. .type                  = "NHD-4.3-ATXI#-T-1",
     
155. };
     
156. // --czx
     
157. structda8xx_lcdc_platform_data  YL_LCD_pdata = {
     
158. .manu_name             = "DH",
     
159. .controller_data        =&lcd_cfg,
     
160. #if defined (CONFIG_DH_320_240)
     
161. .type                  = "YL_LCD35",
     
162. #elif defined(CONFIG_DH_480_272)
     
163. .type                  = "YL_LCD43",
     
164. #elif defined(CONFIG_DH_800_480)
     
165. .type                  = "YL_LCD70",
     
166. #elif definedCONFIG_DH_800_600
     
167. .type                  = "YL_LCD80",
     
168. #elif definedCONFIG_VGA
     
169. .type                  = "YL_VGA",
     
170. #endif
     
171. };
     
172. 
     
173. //end
     
174. #include "common.h"
     
175. 
     
176. /* TSc controller */
     
177. static structtsc_data am335x_touchscreen_data  = {
     
178. .wires  = 4,
     
179. .x_plate_resistance = 200,
     
180. .steps_to_configure = 5,
     
181. };
     
182. 
     
183. static struct adc_data am335x_adc_data = {
     
184. .adc_channels = 4,
     
185. };
     
186. static structmfd_tscadc_board tscadc = {
     
187. .tsc_init = &am335x_touchscreen_data,
     
188. .adc_init = &am335x_adc_data,
     
189. };
     
190. static u8am335x_evm_sk_iis_serializer_direction1[] = {
     
191. RX_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE,
     
192. INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
     
193. INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
     
194. INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
     
195. };
     
196. 
     
197. static struct snd_platform_data am335x_evm_snd_data1 = {
     
198. .tx_dma_offset = 0x46400000, /* McASP1 */
     
199. .rx_dma_offset = 0x46400000,
     
200. .op_mode = DAVINCI_MCASP_IIS_MODE,
     
201. .num_serializer =ARRAY_SIZE(am335x_evm_sk_iis_serializer_direction1),
     
202. .tdm_slots = 2,
     
203. .serial_dir = am335x_evm_sk_iis_serializer_direction1,
     
204. .asp_chan_q = EVENTQ_2,
     
205. .version = MCASP_VERSION_3,
     
206. .txnumevt = 1,
     
207. .rxnumevt = 1,
     
208. .get_context_loss_count =
     
209.    omap_pm_get_dev_context_loss_count,
     
210. };
     
211. static structsnd_platform_data am335x_evm_sk_snd_data1 = {
     
212. .tx_dma_offset = 0x46400000, /* McASP1 */
     
213. .rx_dma_offset = 0x46400000,
     
214. .op_mode = DAVINCI_MCASP_IIS_MODE,
     
215. .num_serializer =ARRAY_SIZE(am335x_evm_sk_iis_serializer_direction1),
     
216. .tdm_slots = 2,
     
217. .serial_dir = am335x_evm_sk_iis_serializer_direction1,
     
218. .asp_chan_q = EVENTQ_2,
     
219. .version = MCASP_VERSION_3,
     
220. .txnumevt = 1,
     
221. .rxnumevt = 1,
     
222.   .get_context_loss_count =
     
223.       omap_pm_get_dev_context_loss_count,
     
224. };
     
225. static structomap2_hsmmc_info am335x_mmc[] __initdata = {
     
226. {
     
227.   .mmc           = 1,
     
228.   .caps           =MMC_CAP_4_BIT_DATA,
     
229.   .gpio_cd        = GPIO_TO_PIN(0,6),
     
230.   .gpio_wp        =-EINVAL,//GPIO_TO_PIN(3, 18),//--czx
     
231.   .ocr_mask       = MMC_VDD_32_33 |MMC_VDD_33_34, /* 3V3 */
     
232. },
     
233. {
     
234.   .mmc           = 0, /* will be set at runtime */
     
235. },
     
236. {
     
237.   .mmc           = 0, /* will be set at runtime */
     
238. },
     
239. {}      /* Terminator */
     
240. };
     
241. #ifdefCONFIG_OMAP_MUX
     
242. static structomap_board_mux board_mux[] __initdata = {
     
243. /*
     
244.   * Setting SYSBOOT[5] should set xdma_event_intr0 pin to mode 3 thereby
     
245.   * allowing clkout1 to be available on xdma_event_intr0.
     
246.   * However, on some boards (like EVM-SK), SYSBOOT[5] isn't properly
     
247.   * latched.
     
248.   * To be extra cautious, setup the pin-mux manually.
     
249.   * If any modules/usecase requries it in different mode, then subsequent
     
250.   * module init call will change the mux accordingly.
     
251.   */
     
252. AM33XX_MUX(XDMA_EVENT_INTR0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT),
     
253. AM33XX_MUX(I2C0_SDA,OMAP_MUX_MODE0 | AM33XX_SLEWCTRL_SLOW |
     
254.                        AM33XX_INPUT_EN |AM33XX_PIN_OUTPUT),
     
255. AM33XX_MUX(I2C0_SCL,OMAP_MUX_MODE0 | AM33XX_SLEWCTRL_SLOW |
     
256.    AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT),
     
257. {.reg_offset = OMAP_MUX_TERMINATOR },
     
258. };
     
259. #else
     
260. #define board_mux NULL
     
261. #endif
     
262. /* module pinmux structure */
     
263. struct pinmux_config {
     
264. const char *string_name; /* signal name format */
     
265. int val; /* Options for the mux register value */
     
266. };
     
267. structevm_dev_cfg {
     
268. void (*device_init)(int evm_id, int profile);
     
269. /*
     
270. * If the device is required on both baseboard & daughter board (ex i2c),
     
271. * specify DEV_ON_BASEBOARD
     
272. */
     
273. #define DEV_ON_BASEBOARD 0
     
274. #define DEV_ON_DGHTR_BRD 1
     
275. u32 device_on;
     
276. u32profile; /* Profiles (0-7) in which the module is present */
     
277. };
     
278. /* AM335X -CPLD Register Offsets */
     
279. #define CPLD_DEVICE_HDR 0x00 /* CPLD Header */
     
280. #define CPLD_DEVICE_ID 0x04 /* CPLD identification */
     
281. #define CPLD_DEVICE_REV 0x0C/* Revision of the CPLD code */
     
282. #define CPLD_CFG_REG 0x10 /* Configuration Register */
     
283. static structi2c_client *cpld_client;
     
284. static u32 am335x_evm_id;
     
285. static struct omap_board_config_kernel am335x_evm_config[] __initdata = {
     
286. };
     
287. /*
     
288. * EVM Config held in On-Board eeprom device.
     
289. *
     
290. * Header Format
     
291. *
     
292. *  Name   Size Contents
     
293. *   (Bytes)
     
294. *-------------------------------------------------------------
     
295. *  Header  4 0xAA, 0x55, 0x33, 0xEE
     
296. *
     
297. *  Board Name  8 Name for board in ASCII.
     
298. *    Example "A33515BB" = "AM335x 15x15 BaseBoard"
     
299. *
     
300. *  Version  4 Hardware version code for board inASCII.
     
301. *    "1.0A"= rev.01.0A
     
302. *
     
303. *  Serial Number 12 Serial number of the board. This is a 12
     
304. *    character string which is WWYY4P16nnnn, where
     
305. *    WW = 2 digit week of the year of production
     
306. *    YY = 2 digit year of production
     
307. *    nnnn = incrementing board number
     
308. *
     
309. *  Configuration option 32 Codes(TBD) to show the configuration
     
310. *    setup on this board.
     
311. *
     
312. *  Available  32720 Available space for other non-volatiledata.
     
313. */
     
314. struct am335x_evm_eeprom_config {
     
315. u32 header;
     
316. u8 name[8];
     
317. char version[4];
     
318. u8 serial[12];
     
319. u8 opt[32];
     
320. };
     
321. /*
     
322. * EVM Config held in daughter board eeprom device.
     
323. *
     
324. * Header Format
     
325. *
     
326. *  Name   Size  Contents
     
327. *   (Bytes)
     
328. *-------------------------------------------------------------
     
329. *  Header  4 0xAA, 0x55, 0x33, 0xEE
     
330. *
     
331. *  Board Name  8 Name for board in ASCII.
     
332. *    example "A335GPBD" = "AM335x
     
333. *    General Purpose Daughterboard"
     
334. *
     
335. *  Version  4 Hardware version code for board in
     
336. *    in ASCII. "1.0A" = rev.01.0A
     
337. *  Serial Number 12 Serial number of the board. This is a 12
     
338. *    character string which is: WWYY4P13nnnn, where
     
339. *    WW = 2 digit week of the year of production
     
340. *    YY = 2 digit year of production
     
341. *    nnnn = incrementing board number
     
342. *  Configuration Option 32 Codes to show the configuration
     
343. *    setup on this board.
     
344. *  CPLD Version 8  CPLD code version for board in ASCII
     
345. *    "CPLD1.0A"= rev. 01.0A of theCPLD
     
346. *  Available 32700  Available space for other non-volatile
     
347. *    codes/data
     
348. */
     
349. structam335x_eeprom_config1 {
     
350. u32 header;
     
351. u8 name[8];
     
352. char version[4];
     
353. u8 serial[12];
     
354. u8 opt[32];
     
355. u8 cpld_ver[8];
     
356. };
     
357. static structam335x_evm_eeprom_config config;
     
358. static struct am335x_eeprom_config1 config1;
     
359. static bool daughter_brd_detected;
     
360. #defineEEPROM_MAC_ADDRESS_OFFSET 60 /* 4+8+4+12+32 */
     
361. #define EEPROM_NO_OF_MAC_ADDR  3
     
362. static char am335x_mac_addr[EEPROM_NO_OF_MAC_ADDR][ETH_ALEN];
     
363. #defineAM335X_EEPROM_HEADER  0xEE3355AA
     
364. static intam33xx_evmid = -EINVAL;
     
365. /*
     
366. * am335x_evm_set_id - set up board evmid
     
367. * @evmid - evm id which needs to be configured
     
368. *
     
369. * This function is called to configure board evm id.
     
370. */
     
371. void am335x_evm_set_id(unsigned int evmid)
     
372. {
     
373. am33xx_evmid = evmid;
     
374. return;
     
375. }
     
376. /*
     
377. * am335x_evm_get_id - returns Board Type (EVM/BB/EVM-SK ...)
     
378. *
     
379. * Note:
     
380. * returns -EINVAL if Board detection hasn't happened yet.
     
381. */
     
382. int am335x_evm_get_id(void)
     
383. {
     
384. return am33xx_evmid;
     
385. }
     
386. EXPORT_SYMBOL(am335x_evm_get_id);
     
387. /* currentprofile if exists else PROFILE_0 on error */
     
388. static u32 am335x_get_profile_selection(void)
     
389. {
     
390. int val = 0;
     
391. if(!cpld_client)
     
392.   /* error checking is not done in func's calling this routine.
     
393.   so return profile 0 on error */
     
394.   return 0;
     
395. val = i2c_smbus_read_word_data(cpld_client,CPLD_CFG_REG);
     
396. if (val < 0)
     
397.   return 0; /* default to Profile 0 on Error */
     
398. else
     
399.   return val & 0x7;
     
400. }
     
401. static structpinmux_config haptics_pin_mux[] = {
     
402. {"gpmc_ad9.ehrpwm2B",  OMAP_MUX_MODE4 |
     
403.   AM33XX_PIN_OUTPUT},
     
404. {NULL, 0},
     
405. };
     
406. /* Module pinmux for LCDC */
     
407. static struct pinmux_config lcdc_pin_mux[] = {
     
408. {"lcd_data0.lcd_data0",  OMAP_MUX_MODE0 |AM33XX_PIN_OUTPUT
     
409.              |AM33XX_PULL_DISA},
     
410. {"lcd_data1.lcd_data1",  OMAP_MUX_MODE0 |AM33XX_PIN_OUTPUT
     
411.              |AM33XX_PULL_DISA},
     
412. {"lcd_data2.lcd_data2",  OMAP_MUX_MODE0 |AM33XX_PIN_OUTPUT
     
413.              |AM33XX_PULL_DISA},
     
414. {"lcd_data3.lcd_data3",  OMAP_MUX_MODE0 |AM33XX_PIN_OUTPUT
     
415.              |AM33XX_PULL_DISA},
     
416. {"lcd_data4.lcd_data4",  OMAP_MUX_MODE0 |AM33XX_PIN_OUTPUT
     
417.              |AM33XX_PULL_DISA},
     
418. {"lcd_data5.lcd_data5",  OMAP_MUX_MODE0 |AM33XX_PIN_OUTPUT
     
419.              | AM33XX_PULL_DISA},
     
420. {"lcd_data6.lcd_data6",  OMAP_MUX_MODE0 |AM33XX_PIN_OUTPUT
     
421.              |AM33XX_PULL_DISA},
     
422. {"lcd_data7.lcd_data7",  OMAP_MUX_MODE0 |AM33XX_PIN_OUTPUT
     
423.              |AM33XX_PULL_DISA},
     
424. {"lcd_data8.lcd_data8",  OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
     
425.              |AM33XX_PULL_DISA},
     
426. {"lcd_data9.lcd_data9",  OMAP_MUX_MODE0 |AM33XX_PIN_OUTPUT
     
427.              |AM33XX_PULL_DISA},
     
428. {"lcd_data10.lcd_data10", OMAP_MUX_MODE0 |AM33XX_PIN_OUTPUT
     
429.              |AM33XX_PULL_DISA},
     
430. {"lcd_data11.lcd_data11", OMAP_MUX_MODE0 |AM33XX_PIN_OUTPUT
     
431.              |AM33XX_PULL_DISA},
     
432. {"lcd_data12.lcd_data12", OMAP_MUX_MODE0 |AM33XX_PIN_OUTPUT
     
433.              |AM33XX_PULL_DISA},
     
434. {"lcd_data13.lcd_data13", OMAP_MUX_MODE0 |AM33XX_PIN_OUTPUT
     
435.              | AM33XX_PULL_DISA},
     
436. {"lcd_data14.lcd_data14", OMAP_MUX_MODE0 |AM33XX_PIN_OUTPUT
     
437.              |AM33XX_PULL_DISA},
     
438. {"lcd_data15.lcd_data15", OMAP_MUX_MODE0 |AM33XX_PIN_OUTPUT
     
439.              |AM33XX_PULL_DISA},
     
440. {"lcd_vsync.lcd_vsync",  OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
     
441. {"lcd_hsync.lcd_hsync",  OMAP_MUX_MODE0 |AM33XX_PIN_OUTPUT},
     
442. {"lcd_pclk.lcd_pclk",  OMAP_MUX_MODE0 |AM33XX_PIN_OUTPUT},
     
443. {"lcd_ac_bias_en.lcd_ac_bias_en", OMAP_MUX_MODE0 |AM33XX_PIN_OUTPUT},
     
444. {NULL, 0},
     
445. };
     
446. static structpinmux_config tsc_pin_mux[] = {
     
447. {"ain0.ain0",          OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
     
448. {"ain1.ain1",          OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
     
449. {"ain2.ain2",          OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
     
450. {"ain3.ain3",          OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
     
451. {"vrefp.vrefp",        OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
     
452. {"vrefn.vrefn",        OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
     
453. {NULL, 0},
     
454. };
     
455. /* Pin muxfor nand flash module */
     
456. static struct pinmux_config nand_pin_mux[] = {
     
457. {"gpmc_ad0.gpmc_ad0",   OMAP_MUX_MODE0 |AM33XX_PIN_INPUT_PULLUP},
     
458. {"gpmc_ad1.gpmc_ad1",   OMAP_MUX_MODE0 |AM33XX_PIN_INPUT_PULLUP},
     
459. {"gpmc_ad2.gpmc_ad2",   OMAP_MUX_MODE0 |AM33XX_PIN_INPUT_PULLUP},
     
460. {"gpmc_ad3.gpmc_ad3",   OMAP_MUX_MODE0 |AM33XX_PIN_INPUT_PULLUP},
     
461. {"gpmc_ad4.gpmc_ad4",   OMAP_MUX_MODE0 |AM33XX_PIN_INPUT_PULLUP},
     
462. {"gpmc_ad5.gpmc_ad5",   OMAP_MUX_MODE0 |AM33XX_PIN_INPUT_PULLUP},
     
463. {"gpmc_ad6.gpmc_ad6",   OMAP_MUX_MODE0 |AM33XX_PIN_INPUT_PULLUP},
     
464. {"gpmc_ad7.gpmc_ad7",   OMAP_MUX_MODE0 |AM33XX_PIN_INPUT_PULLUP},
     
465. {"gpmc_wait0.gpmc_wait0", OMAP_MUX_MODE0 |AM33XX_PIN_INPUT_PULLUP},
     
466. {"gpmc_wpn.gpmc_wpn",   OMAP_MUX_MODE7 |AM33XX_PIN_INPUT_PULLUP},
     
467. {"gpmc_csn0.gpmc_csn0",   OMAP_MUX_MODE0 |AM33XX_PULL_DISA},
     
468. {"gpmc_advn_ale.gpmc_advn_ale",  OMAP_MUX_MODE0 |AM33XX_PULL_DISA},
     
469. {"gpmc_oen_ren.gpmc_oen_ren",  OMAP_MUX_MODE0 |AM33XX_PULL_DISA},
     
470. {"gpmc_wen.gpmc_wen",     OMAP_MUX_MODE0 |AM33XX_PULL_DISA},
     
471. {"gpmc_ben0_cle.gpmc_ben0_cle",  OMAP_MUX_MODE0 |AM33XX_PULL_DISA},
     
472. {NULL, 0},
     
473. };
     
474. /* Module pinmux for rgmii1 */
     
475. static struct pinmux_config rgmii1_pin_mux[] = {
     
476. {"mii1_txen.rgmii1_tctl", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
     
477. {"mii1_rxdv.rgmii1_rctl", OMAP_MUX_MODE2 |AM33XX_PIN_INPUT_PULLDOWN},
     
478. {"mii1_txd3.rgmii1_td3", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
     
479. {"mii1_txd2.rgmii1_td2", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
     
480. {"mii1_txd1.rgmii1_td1", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
     
481. {"mii1_txd0.rgmii1_td0", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
     
482. {"mii1_txclk.rgmii1_tclk", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
     
483. {"mii1_rxclk.rgmii1_rclk", OMAP_MUX_MODE2 |AM33XX_PIN_INPUT_PULLDOWN},
     
484. {"mii1_rxd3.rgmii1_rd3", OMAP_MUX_MODE2 |AM33XX_PIN_INPUT_PULLDOWN},
     
485. {"mii1_rxd2.rgmii1_rd2", OMAP_MUX_MODE2 |AM33XX_PIN_INPUT_PULLDOWN},
     
486. {"mii1_rxd1.rgmii1_rd1", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
     
487. {"mii1_rxd0.rgmii1_rd0", OMAP_MUX_MODE2 |AM33XX_PIN_INPUT_PULLDOWN},
     
488. {"mdio_data.mdio_data", OMAP_MUX_MODE0 |AM33XX_PIN_INPUT_PULLUP},
     
489. {"mdio_clk.mdio_clk", OMAP_MUX_MODE0 |AM33XX_PIN_OUTPUT_PULLUP},
     
490. {NULL, 0},
     
491. };
     
492. /* Module pinmux for rgmii2 */
     
493. static struct pinmux_config rgmii2_pin_mux[] = {
     
494. {"gpmc_a0.rgmii2_tctl", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
     
495. {"gpmc_a1.rgmii2_rctl", OMAP_MUX_MODE2 |AM33XX_PIN_INPUT_PULLDOWN},
     
496. {"gpmc_a2.rgmii2_td3", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
     
497. {"gpmc_a3.rgmii2_td2", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
     
498. {"gpmc_a4.rgmii2_td1", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
     
499. {"gpmc_a5.rgmii2_td0", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
     
500. {"gpmc_a6.rgmii2_tclk", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
     
501. {"gpmc_a7.rgmii2_rclk", OMAP_MUX_MODE2 |AM33XX_PIN_INPUT_PULLDOWN},
     
502. {"gpmc_a8.rgmii2_rd3", OMAP_MUX_MODE2 |AM33XX_PIN_INPUT_PULLDOWN},
     
503. {"gpmc_a9.rgmii2_rd2", OMAP_MUX_MODE2 |AM33XX_PIN_INPUT_PULLDOWN},
     
504. {"gpmc_a10.rgmii2_rd1", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
     
505. {"gpmc_a11.rgmii2_rd0", OMAP_MUX_MODE2 |AM33XX_PIN_INPUT_PULLDOWN},
     
506. {"mdio_data.mdio_data", OMAP_MUX_MODE0 |AM33XX_PIN_INPUT_PULLUP},
     
507. {"mdio_clk.mdio_clk", OMAP_MUX_MODE0 |AM33XX_PIN_OUTPUT_PULLUP},
     
508. {NULL, 0},
     
509. };
     
510. static structpinmux_config i2c0_pin_mux[]= {
     
511.         {"i2c0_sda.i2c0_sda",   OMAP_MUX_MODE0 | AM33XX_SLEWCTRL_SLOW |
     
512.                                        AM33XX_PULL_ENBL | AM33XX_INPUT_EN},
     
513.         {"i2c0_scl.i2c0_scl",  OMAP_MUX_MODE0 | AM33XX_SLEWCTRL_SLOW |
     
514.                                        AM33XX_PULL_ENBL | AM33XX_INPUT_EN},
     
515.         {NULL, 0},
     
516. };
     
517. 
     
518. /* Module pin mux for mcasp1 */
     
519. static struct pinmux_config mcasp1_pin_mux[] = {
     
520. {"mii1_crs.mcasp1_aclkx", OMAP_MUX_MODE4 |AM33XX_PIN_INPUT_PULLDOWN},
     
521. {"mii1_rxerr.mcasp1_fsx", OMAP_MUX_MODE4 |AM33XX_PIN_INPUT_PULLDOWN},
     
522. {"mii1_col.mcasp1_axr2", OMAP_MUX_MODE4 |AM33XX_PIN_INPUT_PULLDOWN},
     
523. {"rmii1_refclk.mcasp1_ahclkx", OMAP_MUX_MODE6|AM33XX_PIN_OUTPUT},
     
524. {"mcasp0_ahclkx.mcasp1_axr1", OMAP_MUX_MODE3 |AM33XX_PIN_INPUT_PULLDOWN},
     
525. {NULL, 0},
     
526. };
     
527. 
     
528. /* Module pin mux for mmc0 */
     
529. static struct pinmux_config mmc0_common_pin_mux[] = {
     
530. {"mmc0_dat3.mmc0_dat3", OMAP_MUX_MODE0 |AM33XX_PIN_INPUT_PULLUP},
     
531. {"mmc0_dat2.mmc0_dat2", OMAP_MUX_MODE0 |AM33XX_PIN_INPUT_PULLUP},
     
532. {"mmc0_dat1.mmc0_dat1", OMAP_MUX_MODE0 |AM33XX_PIN_INPUT_PULLUP},
     
533. {"mmc0_dat0.mmc0_dat0", OMAP_MUX_MODE0 |AM33XX_PIN_INPUT_PULLUP},
     
534. {"mmc0_clk.mmc0_clk", OMAP_MUX_MODE0 |AM33XX_PIN_INPUT_PULLUP},
     
535. {"mmc0_cmd.mmc0_cmd", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
     
536. {NULL, 0},
     
537. };
     
538. 
     
539. static struct pinmux_config uart4_pin_mux[] ={                              
     
540. {"uart0_ctsn.uart4_rxd", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
     
541. {"uart0_rtsn.uart4_txd", OMAP_MUX_MODE1 | AM33XX_PULL_ENBL},
     
542. {NULL, 0},
     
543. };
     
544. static structpinmux_config d_can_gp_pin_mux[] = {
     
545. {"uart0_ctsn.d_can1_tx", OMAP_MUX_MODE2 | AM33XX_PULL_ENBL},
     
546. {"uart0_rtsn.d_can1_rx", OMAP_MUX_MODE2 |AM33XX_PIN_INPUT_PULLUP},
     
547. {NULL, 0},
     
548. };
     
549. /* pinmux forgpio based key */
     
550. static struct pinmux_config gpio_keys_pin_mux[] ={                     //lh
     
551. {"mcasp0_aclkx.gpio3_14", OMAP_MUX_MODE7 |AM33XX_PIN_INPUT},//K1
     
552. {"mcasp0_fsx.gpio3_15", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
     
553. {"mcasp0_axr0.gpio3_16", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
     
554. {"mcasp0_aclkr.gpio3_18", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
     
555. {NULL, 0},
     
556. };
     
557. /* pinmux forled device */
     
558. static struct pinmux_config gpio_led_mux[] ={                     //lh
     
559. {"gpmc_csn1.gpio1_30", OMAP_MUX_MODE7 |AM33XX_PIN_OUTPUT},
     
560. {"gpmc_csn2.gpio1_31", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
     
561. {NULL, 0},
     
562. };
     
563. 
     
564. /*
     
565. * @pin_mux - single module pin-mux structure which defines pin-mux
     
566. *   details for all its pins.
     
567. */
     
568. static void setup_pin_mux(struct pinmux_config *pin_mux)
     
569. {
     
570. int i;
     
571. for (i= 0; pin_mux->string_name != NULL; pin_mux++)
     
572.   omap_mux_init_signal(pin_mux->string_name, pin_mux->val);
     
573. }
     
574. static structgpio_keys_platform_data am335x_evm_volume_gpio_key_info = {
     
575. /*.buttons        =am335x_evm_volume_gpio_buttons,
     
576. .nbuttons       =ARRAY_SIZE(am335x_evm_volume_gpio_buttons),*/
     
577. };
     
578. static structplatform_device am335x_evm_volume_keys = {
     
579. .name   = "gpio-keys",
     
580. .id     = -1,
     
581. .dev    = {
     
582.   .platform_data  = &am335x_evm_volume_gpio_key_info,
     
583. },
     
584. };
     
585. static voidvolume_keys_init(int evm_id, int profile)
     
586. {
     
587. int err;
     
588. //setup_pin_mux(volume_keys_pin_mux);
     
589. err = platform_device_register(&am335x_evm_volume_keys);
     
590. if (err)
     
591.   pr_err("failed to register matrix keypad (2x3)device\n");
     
592. }
     
593. /*
     
594. * @evm_id - evm id which needs to be configured
     
595. * @dev_cfg - single evm structure which includes
     
596. *    all module inits, pin-mux defines
     
597. * @profile - if present, else PROFILE_NONE
     
598. * @dghtr_brd_flg - Whether Daughter board is present or not
     
599. */
     
600. static void _configure_device(int evm_id, struct evm_dev_cfg *dev_cfg,
     
601. int profile)
     
602. {
     
603. int i;
     
604. am335x_evm_set_id(evm_id);
     
605. /*
     
606. * Only General Purpose & Industrial Auto Motro Control
     
607. * EVM has profiles. So check if this evm has profile.
     
608. * If not, ignore the profile comparison
     
609. */
     
610. /*
     
611. * If the device is on baseboard, directly configure it. Else (device on
     
612. * Daughter board), check if the daughter card is detected.
     
613. */
     
614. if (profile == PROFILE_NONE) {
     
615.   for (i = 0; dev_cfg->device_init != NULL; dev_cfg++) {
     
616.    pr_info("_configure_device %d \n",i);
     
617.    if (dev_cfg->device_on == DEV_ON_BASEBOARD)
     
618.     dev_cfg->device_init(evm_id, profile);
     
619.    else if (daughter_brd_detected == true)
     
620.     dev_cfg->device_init(evm_id, profile);
     
621.   }
     
622. } else {
     
623.   for (i = 0; dev_cfg->device_init != NULL; dev_cfg++) {
     
624.    pr_info("_configure_device %d \n",i);
     
625.    if (dev_cfg->profile & profile) {
     
626.     if (dev_cfg->device_on == DEV_ON_BASEBOARD)
     
627.      dev_cfg->device_init(evm_id, profile);
     
628.     else if (daughter_brd_detected == true)
     
629.      dev_cfg->device_init(evm_id, profile);
     
630.    }
     
631.   }
     
632. }
     
633. }
     
634. 
     
635. /* pinmux for usb0 drvvbus */
     
636. static struct pinmux_config usb0_pin_mux[] = {
     
637. {"usb0_drvvbus.usb0_drvvbus",    OMAP_MUX_MODE0| AM33XX_PIN_OUTPUT},
     
638. {NULL, 0},
     
639. };
     
640. /* pinmux forusb1 drvvbus */
     
641. static struct pinmux_config usb1_pin_mux[] = {
     
642. {"usb1_drvvbus.usb1_drvvbus",    OMAP_MUX_MODE0| AM33XX_PIN_OUTPUT},
     
643. {NULL, 0},
     
644. };
     
645. /* Module pinmux for eCAP0 */
     
646. static struct pinmux_config ecap0_pin_mux[] = {
     
647. {"ecap0_in_pwm0_out.ecap0_in_pwm0_out",
     
648.   OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
     
649. {NULL, 0},
     
650. };
     
651. 
     
652. //#define AM335XEVM_WLAN_PMENA_GPIO GPIO_TO_PIN(1, 30)
     
653. //#define AM335XEVM_WLAN_IRQ_GPIO  GPIO_TO_PIN(3, 17)
     
654. //#define AM335XEVM_SK_WLAN_IRQ_GPIO     GPIO_TO_PIN(0, 31)
     
655. structwl12xx_platform_data am335xevm_wlan_data = {
     
656. /*.irq = OMAP_GPIO_IRQ(AM335XEVM_WLAN_IRQ_GPIO),
     
657. .board_ref_clock = WL12XX_REFCLOCK_38_XTAL, /* 38.4Mhz */
     
658. /*.bt_enable_gpio = GPIO_TO_PIN(3, 21),
     
659. .wlan_enable_gpio = GPIO_TO_PIN(1, 16),*/
     
660. };
     
661. static structpinmux_config uart1_wl12xx_pin_mux[] = {
     
662. //{"uart1_ctsn.uart1_ctsn", OMAP_MUX_MODE0 |AM33XX_PIN_OUTPUT},
     
663. //{"uart1_rtsn.uart1_rtsn", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT},
     
664. {"uart1_rxd.uart1_rxd", OMAP_MUX_MODE0 |AM33XX_PIN_INPUT_PULLUP},
     
665. {"uart1_txd.uart1_txd", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL},
     
666. {NULL, 0},
     
667. };
     
668. static structpinmux_config wl12xx_pin_mux[] = {
     
669. //{"gpmc_a0.gpio1_16", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
     
670. //{"mcasp0_ahclkr.gpio3_17", OMAP_MUX_MODE7 |AM33XX_PIN_INPUT},
     
671. //{"mcasp0_ahclkx.gpio3_21", OMAP_MUX_MODE7 |AM33XX_PIN_OUTPUT_PULLUP},
     
672. {NULL, 0},
     
673. };
     
674. static structpinmux_config wl12xx_pin_mux_sk[] = {
     
675. //{"gpmc_wpn.gpio0_31", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
     
676. //{"gpmc_csn0.gpio1_29", OMAP_MUX_MODE7 |AM33XX_PIN_OUTPUT_PULLUP},
     
677. //{"mcasp0_ahclkx.gpio3_21", OMAP_MUX_MODE7 |AM33XX_PIN_OUTPUT},
     
678. {NULL, 0},
     
679. };
     
680. static boolbacklight_enable;
     
681. static voidenable_ecap0(int evm_id, int profile)
     
682. {
     
683. backlight_enable = true;
     
684. setup_pin_mux(ecap0_pin_mux);
     
685. }
     
686. static voidenable_ecap2(int evm_id, int profile)
     
687. {
     
688. backlight_enable = true;
     
689. //setup_pin_mux(ecap2_pin_mux);
     
690. }
     
691. /* Setuppwm-backlight */
     
692. static struct platform_device am335x_backlight = {
     
693. .name           ="pwm-backlight",
     
694. .id            = -1,
     
695. .dev  = {
     
696.   .platform_data = &am335x_backlight_data0,
     
697. },
     
698. };
     
699. static structpwmss_platform_data  pwm_pdata[3] = {
     
700. {
     
701.   .version = PWM_VERSION_1,
     
702. },
     
703. {
     
704.   .version = PWM_VERSION_1,
     
705. },
     
706. {
     
707.   .version = PWM_VERSION_1,
     
708. },
     
709. };
     
710. static int__init backlight_init(void)
     
711. {
     
712. int status = 0;
     
713. if(backlight_enable) {
     
714.   int ecap_index = 0;
     
715.   switch(am335x_evm_get_id()) {
     
716.   case GEN_PURP_EVM:
     
717.   case GEN_PURP_DDR3_EVM:
     
718.    ecap_index = 0;
     
719.    break;
     
720.   case EVM_SK:
     
721.    /*
     
722.     * Invert polarity of PWM wave from ECAP to handle
     
723.     * backlight intensity to pwm brightness
     
724.     */
     
725.    ecap_index = 2;
     
726.    pwm_pdata[ecap_index].chan_attrib[0].inverse_pol = true;
     
727.    am335x_backlight.dev.platform_data =
     
728.     &am335x_backlight_data2;
     
729.    break;
     
730.   default:
     
731.    pr_err("%s: Error on attempting to enablebacklight,"
     
732.     " not supported\n", __func__);
     
733.    return -EINVAL;
     
734.   }
     
735.   am33xx_register_ecap(ecap_index,&pwm_pdata[ecap_index]);
     
736.   platform_device_register(&am335x_backlight);
     
737. }
     
738. return status;
     
739. }
     
740. late_initcall(backlight_init);
     
741. static int__init conf_disp_pll(int rate)
     
742. {
     
743. struct clk *disp_pll;
     
744. int ret = -EINVAL;
     
745. disp_pll= clk_get(NULL, "dpll_disp_ck");
     
746. if (IS_ERR(disp_pll)) {
     
747.   pr_err("Cannot clk_get disp_pll\n");
     
748.   goto out;
     
749. }
     
750. ret =clk_set_rate(disp_pll, rate);
     
751. clk_put(disp_pll);
     
752. out:
     
753. return ret;
     
754. }
     
755. static voidlcdc_init(int evm_id, int profile)
     
756. {
     
757. struct da8xx_lcdc_platform_data *lcdc_pdata;
     
758. setup_pin_mux(lcdc_pin_mux);
     
759. 
     
760. pr_info("lcdc_init ********************************** \n");
     
761. 
     
762. if (conf_disp_pll(300000000)) {
     
763.   pr_info("Failed configure display PLL, not attempting to"
     
764.     "register LCDC\n");
     
765.   return;
     
766. }
     
767. switch (evm_id) {
     
768. case GEN_PURP_EVM:
     
769. case GEN_PURP_DDR3_EVM:
     
770.   lcdc_pdata = &TFC_S9700RTWV35TR_01B_pdata;
     
771.   break;
     
772. case EVM_SK:
     
773.   //lcdc_pdata = &NHD_480272MF_ATXI_pdata;
     
774.   lcdc_pdata = &YL_LCD_pdata;
     
775.   break;
     
776. default:
     
777.   pr_err("LCDC not supported on this evm (%d)\n",evm_id);
     
778.   return;
     
779. }
     
780. lcdc_pdata->get_context_loss_count= omap_pm_get_dev_context_loss_count;
     
781. if(am33xx_register_lcdc(lcdc_pdata))
     
782.   pr_info("Failed to register LCDC device\n");
     
783. return;
     
784. }
     
785. 
     
786. static void mfd_tscadc_init(int evm_id, int profile)
     
787. {
     
788. int err;
     
789. 
     
790. pr_info("mfd_tscadc_init **********************************\n");
     
791. 
     
792. err = am33xx_register_mfd_tscadc(&tscadc);
     
793. if (err)
     
794.   pr_err("failed to register touchscreen device\n");
     
795. }
     
796. static voidrgmii1_init(int evm_id, int profile)
     
797. {
     
798. pr_info("rgmii1_init ********************************** \n");
     
799. setup_pin_mux(rgmii1_pin_mux);
     
800. return;
     
801. }
     
802. static voidrgmii2_init(int evm_id, int profile)
     
803. {
     
804. pr_info("rgmii2_init ********************************** \n");
     
805. setup_pin_mux(rgmii2_pin_mux);
     
806. return;
     
807. }
     
808. static voidusb0_init(int evm_id, int profile)
     
809. {
     
810. setup_pin_mux(usb0_pin_mux);
     
811. return;
     
812. }
     
813. static voidusb1_init(int evm_id, int profile)
     
814. {
     
815. setup_pin_mux(usb1_pin_mux);
     
816. return;
     
817. }
     
818. /* setupuart4 */            //lh
     
819. static void uart4_init(int evm_id, int profile)
     
820. {
     
821. pr_info("uart4_init ********************************** \n");
     
822. setup_pin_mux(uart4_pin_mux);
     
823. return;
     
824. }
     
825. /* setupuart3 */
     
826. static void uart3_init(int evm_id, int profile)
     
827. {
     
828. pr_info("uart3_init ********************************** \n");
     
829. //setup_pin_mux(uart3_pin_mux);
     
830. return;
     
831. }
     
832. /* setupuart2 */
     
833. static void uart2_init(int evm_id, int profile)
     
834. {
     
835. pr_info("uart2_init ********************************** \n");
     
836. //setup_pin_mux(uart2_pin_mux);
     
837. return;
     
838. }
     
839. /*
     
840. * gpio0_7 was driven HIGH in u-boot before DDR configuration
     
841. *
     
842. * setup gpio0_7 for EVM-SK 1.2
     
843. */
     
844. static void gpio_ddr_vtt_enb_init(int evm_id, int profile)
     
845. {
     
846. //setup_pin_mux(gpio_ddr_vtt_enb_pin_mux);
     
847. return;
     
848. }
     
849. /* setuphaptics */
     
850. #define HAPTICS_MAX_FREQ 250
     
851. static void haptics_init(int evm_id, int profile)
     
852. {
     
853. //setup_pin_mux(haptics_pin_mux);
     
854. pwm_pdata[2].chan_attrib[1].max_freq = HAPTICS_MAX_FREQ;
     
855. am33xx_register_ehrpwm(2, &pwm_pdata[2]);
     
856. }
     
857. /* NANDpartition information */
     
858. static struct mtd_partition am335x_nand_partitions[] = {
     
859. /* All the partition sizes are listed in terms of NAND block size */
     
860. {
     
861.   .name           ="SPL",
     
862.   .offset         =0,   /* Offset = 0x0 */
     
863.   .size           =SZ_128K,
     
864. },
     
865. {
     
866.   .name           ="SPL.backup1",
     
867.   .offset         =MTDPART_OFS_APPEND, /* Offset = 0x20000 */
     
868.   .size           =SZ_128K,
     
869. },
     
870. {
     
871.   .name           ="SPL.backup2",
     
872.   .offset         = MTDPART_OFS_APPEND, /*Offset = 0x40000 */
     
873.   .size           =SZ_128K,
     
874. },
     
875. {
     
876.   .name           ="SPL.backup3",
     
877.   .offset         =MTDPART_OFS_APPEND, /* Offset = 0x60000 */
     
878.   .size           =SZ_128K,
     
879. },
     
880. {
     
881.   .name           ="U-Boot",
     
882.   .offset         =MTDPART_OFS_APPEND,   /* Offset = 0x80000 */
     
883.   .size           =15 * SZ_128K,
     
884. },
     
885. {
     
886.   .name           ="U-Boot Env",
     
887.   .offset         =MTDPART_OFS_APPEND,   /* Offset = 0x260000 */
     
888.   .size           =1 * SZ_128K,
     
889. },
     
890. {
     
891.   .name           ="Kernel",
     
892.   .offset         =MTDPART_OFS_APPEND,   /* Offset = 0x280000 */
     
893.   .size           =40 * SZ_128K,
     
894. },
     
895. {
     
896.   .name           ="File System",
     
897.   .offset         =MTDPART_OFS_APPEND,   /* Offset = 0x780000 */
     
898.   .size           =MTDPART_SIZ_FULL,
     
899. },
     
900. };
     
901. /* SPI 0/1Platform Data */
     
902. /* SPI flash information */
     
903. static struct mtd_partition am335x_spi_partitions[] = {
     
904. /* All the partition sizes are listed in terms of erase size */
     
905. {
     
906.   .name       = "SPL",
     
907.   .offset     = 0,   /* Offset =0x0 */
     
908.   .size       = SZ_128K,
     
909. },
     
910. {
     
911.   .name       = "U-Boot",
     
912.   .offset     = MTDPART_OFS_APPEND, /*Offset = 0x20000 */
     
913.   .size       = (3 * SZ_128K) - SZ_4K,
     
914. },
     
915. {
     
916.   .name       = "U-Boot Env",
     
917.   .offset     = MTDPART_OFS_APPEND, /*Offset = 0x7F000 */
     
918.   .size       = SZ_4K,
     
919. },
     
920. {
     
921.   .name       = "Kernel",
     
922.   .offset     = MTDPART_OFS_APPEND, /*Offset = 0x80000 */
     
923.   .size       = 866 *SZ_4K,  /* size = 0x362000 */
     
924. },
     
925. {
     
926.   .name       = "FileSystem",
     
927.   .offset     = MTDPART_OFS_APPEND, /*Offset = 0x3E2000 */
     
928.   .size       =MTDPART_SIZ_FULL,  /* size ~= 4.1 MiB */
     
929. }
     
930. };
     
931. static conststruct flash_platform_data am335x_spi_flash = {
     
932. .type      = "w25q64",
     
933. .name      = "spi_flash",
     
934. .parts     = am335x_spi_partitions,
     
935. .nr_parts  = ARRAY_SIZE(am335x_spi_partitions),
     
936. };
     
937. static structgpmc_timings am335x_nand_timings = {
     
938. .sync_clk = 0,
     
939. .cs_on= 0,
     
940. .cs_rd_off = 44,
     
941. .cs_wr_off = 44,
     
942. .adv_on= 6,
     
943. .adv_rd_off = 34,
     
944. .adv_wr_off = 44,
     
945. .we_off = 40,
     
946. .oe_off = 54,
     
947. .access= 64,
     
948. .rd_cycle = 82,
     
949. .wr_cycle = 82,
     
950. .wr_access= 40,
     
951. .wr_data_mux_bus = 0,
     
952. };
     
953. static voidevm_nand_init(int evm_id, int profile)
     
954. {
     
955. struct omap_nand_platform_data *pdata;
     
956. struct gpmc_devices_info gpmc_device[2] = {
     
957.   { NULL, 0 },
     
958.   { NULL, 0 },
     
959. };
     
960. 
     
961. pr_info("evm_nand_init ********************************** \n");
     
962. 
     
963. setup_pin_mux(nand_pin_mux);
     
964. pdata = omap_nand_init(am335x_nand_partitions,
     
965.   ARRAY_SIZE(am335x_nand_partitions), 0, 0,
     
966.   &am335x_nand_timings);
     
967. if (!pdata)
     
968.   return;
     
969. pdata->ecc_opt =OMAP_ECC_BCH8_CODE_HW;
     
970. pdata->elm_used = true;
     
971. gpmc_device[0].pdata = pdata;
     
972. gpmc_device[0].flag = GPMC_DEVICE_NAND;
     
973. omap_init_gpmc(gpmc_device,sizeof(gpmc_device));
     
974. omap_init_elm();
     
975. }
     
976. /* TPS65217voltage regulator support */
     
977. /* 1.8V */
     
978. static struct regulator_consumer_supply tps65217_dcdc1_consumers[] = {
     
979. {
     
980.   .supply = "vdds_osc",
     
981. },
     
982. {
     
983.   .supply = "vdds_pll_ddr",
     
984. },
     
985. {
     
986.   .supply = "vdds_pll_mpu",
     
987. },
     
988. {
     
989.   .supply = "vdds_pll_core_lcd",
     
990. },
     
991. {
     
992.   .supply = "vdds_sram_mpu_bb",
     
993. },
     
994. {
     
995.   .supply = "vdds_sram_core_bg",
     
996. },
     
997. {
     
998.   .supply = "vdda_usb0_1p8v",
     
999. },
     
1000. {
      
1001.   .supply = "vdds_ddr",
      
1002. },
      
1003. {
      
1004.   .supply = "vdds",
      
1005. },
      
1006. {
      
1007.   .supply = "vdds_hvx_1p8v",
      
1008. },
      
1009. {
      
1010.   .supply = "vdda_adc",
      
1011. },
      
1012. {
      
1013.   .supply = "ddr2",
      
1014. },
      
1015. };
      
1016. /* 1.1V */
      
1017. static struct regulator_consumer_supply tps65217_dcdc2_consumers[] = {
      
1018. {
      
1019.   .supply = "vdd_mpu",
      
1020. },
      
1021. };
      
1022. /* 1.1V */
      
1023. static struct regulator_consumer_supply tps65217_dcdc3_consumers[] = {
      
1024. {
      
1025.   .supply = "vdd_core",
      
1026. },
      
1027. };
      
1028. /* 1.8V LDO*/
      
1029. static struct regulator_consumer_supply tps65217_ldo1_consumers[] = {
      
1030. {
      
1031.   .supply = "vdds_rtc",
      
1032. },
      
1033. };
      
1034. /* 3.3V LDO*/
      
1035. static struct regulator_consumer_supply tps65217_ldo2_consumers[] = {
      
1036. {
      
1037.   .supply = "vdds_any_pn",
      
1038. },
      
1039. };
      
1040. /* 3.3V LDO*/
      
1041. static struct regulator_consumer_supply tps65217_ldo3_consumers[] = {
      
1042. {
      
1043.   .supply = "vdds_hvx_ldo3_3p3v",
      
1044. },
      
1045. {
      
1046.   .supply = "vdda_usb0_3p3v",
      
1047. },
      
1048. };
      
1049. /* 3.3V LDO*/
      
1050. static struct regulator_consumer_supply tps65217_ldo4_consumers[] = {
      
1051. {
      
1052.   .supply = "vdds_hvx_ldo4_3p3v",
      
1053. },
      
1054. };
      
1055. /*
      
1056. * FIXME: Some BeagleBones reuire a ramp_delay to settle down the set
      
1057. * voltage from 0.95v to 1.25v. By default a minimum of 70msec is set
      
1058. * based on experimentation. This will be removed/modified to exact
      
1059. * value, once the root cause is known.
      
1060. *
      
1061. * The reason for extended ramp time requirement on BeagleBone is not
      
1062. * known and the delay varies from board - board, if the board hangs
      
1063. * with this 70msec delay then try to increase the value.
      
1064. */
      
1065. static struct tps65217_rdelay dcdc2_ramp_delay = {
      
1066. .ramp_delay = 70000,
      
1067. };
      
1068. static structregulator_init_data tps65217_regulator_data[] = {
      
1069. /* dcdc1 */
      
1070. {
      
1071.   .constraints = {
      
1072.    .min_uV = 900000,
      
1073.    .max_uV = 1800000,
      
1074.    .boot_on = 1,
      
1075.    .always_on = 1,
      
1076.   },
      
1077.   .num_consumer_supplies = ARRAY_SIZE(tps65217_dcdc1_consumers),
      
1078.   .consumer_supplies = tps65217_dcdc1_consumers,
      
1079. },
      
1080. /*dcdc2 */
      
1081. {
      
1082.   .constraints = {
      
1083.    .min_uV = 900000,
      
1084.    .max_uV = 3300000,
      
1085.    .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
      
1086.     REGULATOR_CHANGE_STATUS),
      
1087.    .boot_on = 1,
      
1088.    .always_on = 1,
      
1089.   },
      
1090.   .num_consumer_supplies = ARRAY_SIZE(tps65217_dcdc2_consumers),
      
1091.   .consumer_supplies = tps65217_dcdc2_consumers,
      
1092.   .driver_data = &dcdc2_ramp_delay,
      
1093.   .ignore_check_consumers = 1,
      
1094. },
      
1095. /*dcdc3 */
      
1096. {
      
1097.   .constraints = {
      
1098.    .min_uV = 900000,
      
1099.    .max_uV = 1500000,
      
1100.    .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
      
1101.     REGULATOR_CHANGE_STATUS),
      
1102.    .boot_on = 1,
      
1103.    .always_on = 1,
      
1104.   },
      
1105.   .num_consumer_supplies = ARRAY_SIZE(tps65217_dcdc3_consumers),
      
1106.   .consumer_supplies = tps65217_dcdc3_consumers,
      
1107.   .ignore_check_consumers = 1,
      
1108. },
      
1109. /* ldo1*/
      
1110. {
      
1111.   .constraints = {
      
1112.    .min_uV = 1000000,
      
1113.    .max_uV = 3300000,
      
1114.    .valid_ops_mask = REGULATOR_CHANGE_STATUS,
      
1115.    .boot_on = 1,
      
1116.    .always_on = 1,
      
1117.   },
      
1118.   .num_consumer_supplies = ARRAY_SIZE(tps65217_ldo1_consumers),
      
1119.   .consumer_supplies = tps65217_ldo1_consumers,
      
1120. },
      
1121. /* ldo2*/
      
1122. {
      
1123.   .constraints = {
      
1124.    .min_uV = 900000,
      
1125.    .max_uV = 3300000,
      
1126.    .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
      
1127.     REGULATOR_CHANGE_STATUS),
      
1128.    .boot_on = 1,
      
1129.    .always_on = 1,
      
1130.   },
      
1131.   .num_consumer_supplies = ARRAY_SIZE(tps65217_ldo2_consumers),
      
1132.   .consumer_supplies = tps65217_ldo2_consumers,
      
1133. },
      
1134. /* ldo3*/
      
1135. {
      
1136.   .constraints = {
      
1137.    .min_uV = 1800000,
      
1138.    .max_uV = 3300000,
      
1139.    .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
      
1140.     REGULATOR_CHANGE_STATUS),
      
1141.    .boot_on = 1,
      
1142.    .always_on = 1,
      
1143.   },
      
1144.   .num_consumer_supplies = ARRAY_SIZE(tps65217_ldo3_consumers),
      
1145.   .consumer_supplies = tps65217_ldo3_consumers,
      
1146. },
      
1147. /* ldo4*/
      
1148. {
      
1149.   .constraints = {
      
1150.    .min_uV = 1800000,
      
1151.    .max_uV = 3300000,
      
1152.    .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
      
1153.     REGULATOR_CHANGE_STATUS),
      
1154.    .boot_on = 1,
      
1155.    .always_on = 1,
      
1156.   },
      
1157.   .num_consumer_supplies = ARRAY_SIZE(tps65217_ldo4_consumers),
      
1158.   .consumer_supplies = tps65217_ldo4_consumers,
      
1159. },
      
1160. };
      
1161. static structtps65217_board beaglebone_tps65217_info = {
      
1162. .tps65217_init_data = &tps65217_regulator_data[0],
      
1163. .status_off = true,
      
1164. };
      
1165. 
      
1166. static struct i2c_board_infoam335x_i2c1_boardinfo[]= {
      
1167. #if 0
      
1168. {
      
1169.   I2C_BOARD_INFO("tlv320aic3x",0x1b),
      
1170. },
      
1171.         
      
1172. {
      
1173.   I2C_BOARD_INFO("tsl2550",0x39),
      
1174. },
      
1175. {
      
1176.   I2C_BOARD_INFO("tmp275",0x48),
      
1177. },
      
1178. #endif
      
1179. };
      
1180. static void i2c1_init(int evm_id, int profile)
      
1181. {
      
1182. //setup_pin_mux(i2c1_pin_mux);
      
1183. omap_register_i2c_bus(2,100, am335x_i2c1_boardinfo,
      
1184.    ARRAY_SIZE(am335x_i2c1_boardinfo));
      
1185. return;
      
1186. }
      
1187. static structi2c_board_info am335x_i2c2_boardinfo[] = {
      
1188. };
      
1189. static void i2c2_init(int evm_id, int profile)
      
1190. {
      
1191. //setup_pin_mux(i2c2_pin_mux);
      
1192. omap_register_i2c_bus(3,100, am335x_i2c2_boardinfo,
      
1193.    ARRAY_SIZE(am335x_i2c2_boardinfo));
      
1194. return;
      
1195. }
      
1196. /* SetupMcASP 1 */
      
1197. static void mcasp1_init(int evm_id, int profile)
      
1198. {
      
1199. pr_info("--------mcasp1_init\n");
      
1200. /* Configure McASP */
      
1201. setup_pin_mux(mcasp1_pin_mux);
      
1202. switch (evm_id) {
      
1203. case EVM_SK:
      
1204.   pr_info("--------evm_id is SK\n");
      
1205.   am335x_register_mcasp(&am335x_evm_sk_snd_data1,1);
      
1206.   break;
      
1207. default:
      
1208.   am335x_register_mcasp(&am335x_evm_snd_data1,1);
      
1209. }
      
1210. return;
      
1211. }
      
1212. static voidmmc1_init(int evm_id, int profile)
      
1213. {
      
1214. /*setup_pin_mux(mmc1_common_pin_mux);
      
1215. setup_pin_mux(mmc1_dat4_7_pin_mux);
      
1216. setup_pin_mux(mmc1_wp_only_pin_mux);
      
1217. setup_pin_mux(mmc1_cd_only_pin_mux);
      
1218. am335x_mmc[1].mmc= 2;
      
1219. am335x_mmc[1].caps = MMC_CAP_4_BIT_DATA;
      
1220. am335x_mmc[1].gpio_cd = GPIO_TO_PIN(1, 28);//--czx
      
1221. am335x_mmc[1].gpio_wp = -EINVAL;//GPIO_TO_PIN(1, 29);
      
1222. am335x_mmc[1].ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34; /* 3V3 */
      
1223. /* mmcwill be initialized when mmc0_init is called */
      
1224. return;
      
1225. }
      
1226. static voidmmc1_wl12xx_init(int evm_id, int profile)
      
1227. {
      
1228. /*setup_pin_mux(mmc1_common_pin_mux);
      
1229. am335x_mmc[1].mmc = 2;
      
1230. am335x_mmc[1].name = "wl1271";
      
1231. am335x_mmc[1].caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD;
      
1232. am335x_mmc[1].nonremovable = true;
      
1233. am335x_mmc[1].pm_caps = MMC_PM_KEEP_POWER;
      
1234. am335x_mmc[1].gpio_cd = -EINVAL;
      
1235. am335x_mmc[1].gpio_wp = -EINVAL;
      
1236. am335x_mmc[1].ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34; /* 3V3 */
      
1237. }
      
1238. static voidmmc1_emmc_init(int evm_id, int profile)
      
1239. {
      
1240. /*setup_pin_mux(mmc1_common_pin_mux);
      
1241. setup_pin_mux(mmc1_dat4_7_pin_mux);
      
1242. am335x_mmc[1].mmc= 2;
      
1243. am335x_mmc[1].caps = MMC_CAP_8_BIT_DATA;
      
1244. am335x_mmc[1].gpio_cd = -EINVAL;
      
1245. am335x_mmc[1].gpio_wp = -EINVAL;
      
1246. am335x_mmc[1].ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34; /* 3V3 */
      
1247. /* mmcwill be initialized when mmc0_init is called */
      
1248. return;
      
1249. }
      
1250. static voidmmc2_wl12xx_init(int evm_id, int profile)
      
1251. {
      
1252. /*setup_pin_mux(mmc2_wl12xx_pin_mux);
      
1253. am335x_mmc[1].mmc= 3;
      
1254. am335x_mmc[1].name = "wl1271";
      
1255. am335x_mmc[1].caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD;
      
1256. am335x_mmc[1].nonremovable = true;
      
1257. am335x_mmc[1].gpio_cd = -EINVAL;
      
1258. am335x_mmc[1].gpio_wp = -EINVAL;
      
1259. am335x_mmc[1].ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34; /* 3V3 */
      
1260. /* mmcwill be initialized when mmc0_init is called */
      
1261. return;
      
1262. }
      
1263. static voiduart1_wl12xx_init(int evm_id, int profile)
      
1264. {
      
1265. setup_pin_mux(uart1_wl12xx_pin_mux);
      
1266. }
      
1267. static voidwl12xx_bluetooth_enable(void)
      
1268. {
      
1269. int status = gpio_request(am335xevm_wlan_data.bt_enable_gpio,
      
1270.   "bt_en\n");
      
1271. if (status < 0)
      
1272.   pr_err("Failed to request gpio for bt_enable");
      
1273. pr_info("ConfigureBluetooth Enable pin...\n");
      
1274. gpio_direction_output(am335xevm_wlan_data.bt_enable_gpio, 0);
      
1275. }
      
1276. #defineAM33XX_CTRL_REGADDR(reg)     \
      
1277.   AM33XX_L4_WK_IO_ADDRESS(AM33XX_SCM_BASE + (reg))
      
1278. /* wlanenable pin */
      
1279. #define AM33XX_CONTROL_PADCONF_GPMC_CSN0_OFFSET  0x087C
      
1280. static int wl12xx_set_power(struct device *dev, int slot, int on, int vdd)
      
1281. {
      
1282. int pad_mux_value;
      
1283. if (on){
      
1284.   gpio_direction_output(am335xevm_wlan_data.wlan_enable_gpio, 1);
      
1285.   /*Enable pullup on the WLAN enable pin for keeping wlan active during suspend
      
1286.      in wowlan mode */
      
1287.   if ( am335x_evm_get_id() == EVM_SK ) {
      
1288.    pad_mux_value = readl(AM33XX_CTRL_REGADDR(AM33XX_CONTROL_PADCONF_GPMC_CSN0_OFFSET));
      
1289.    pad_mux_value &= (~AM33XX_PULL_DISA);
      
1290.    writel(pad_mux_value,AM33XX_CTRL_REGADDR(AM33XX_CONTROL_PADCONF_GPMC_CSN0_OFFSET));
      
1291.   }
      
1292.   mdelay(70);
      
1293. } else {
      
1294.   gpio_direction_output(am335xevm_wlan_data.wlan_enable_gpio, 0);
      
1295.   /* Disable pullup on the WLAN enable when WLAN is off */
      
1296.   if ( am335x_evm_get_id() == EVM_SK ) {
      
1297.    pad_mux_value =readl(AM33XX_CTRL_REGADDR(AM33XX_CONTROL_PADCONF_GPMC_CSN0_OFFSET));
      
1298.    pad_mux_value |= AM33XX_PULL_DISA;
      
1299.    writel(pad_mux_value, AM33XX_CTRL_REGADDR(AM33XX_CONTROL_PADCONF_GPMC_CSN0_OFFSET));
      
1300.   }
      
1301. }
      
1302. return0;
      
1303. }
      
1304. static voidd_can_init(int evm_id, int profile)
      
1305. {
      
1306. switch (evm_id) {
      
1307. case IND_AUT_MTR_EVM:
      
1308.   if ((profile == PROFILE_0) || (profile == PROFILE_1)) {
      
1309.    setup_pin_mux(d_can_gp_pin_mux);
      
1310.    /* Instance Zero */
      
1311.    am33xx_d_can_init(0);
      
1312.   }
      
1313.   break;
      
1314. case GEN_PURP_EVM:
      
1315. case GEN_PURP_DDR3_EVM:
      
1316.   if (profile == PROFILE_1) {
      
1317.    setup_pin_mux(d_can_gp_pin_mux);
      
1318.    /* Instance One */
      
1319.    am33xx_d_can_init(1);
      
1320.   }
      
1321.   break;
      
1322. default:
      
1323.   break;
      
1324. }
      
1325. }
      
1326. static voidmmc0_init(int evm_id, int profile)
      
1327. {
      
1328. switch (evm_id) {
      
1329. case BEAGLE_BONE_A3:
      
1330. case BEAGLE_BONE_OLD:
      
1331. case EVM_SK:
      
1332.   setup_pin_mux(mmc0_common_pin_mux);
      
1333.   //setup_pin_mux(mmc0_cd_only_pin_mux);
      
1334.   break;
      
1335. default:
      
1336.   setup_pin_mux(mmc0_common_pin_mux);
      
1337.   //setup_pin_mux(mmc0_cd_only_pin_mux);
      
1338.   
      
1339.   break;
      
1340. }
      
1341. omap2_hsmmc_init(am335x_mmc);
      
1342. return;
      
1343. }
      
1344. static structi2c_board_info tps65217_i2c_boardinfo[] = {
      
1345. {
      
1346.   I2C_BOARD_INFO("tps65217",TPS65217_I2C_ID),
      
1347.   .platform_data  = &beaglebone_tps65217_info,
      
1348. },
      
1349. };
      
1350. static voidtps65217_init(int evm_id, int profile)
      
1351. {
      
1352. struct i2c_adapter*adapter;
      
1353. struct i2c_client*client;
      
1354. struct device *mpu_dev;
      
1355. struct tps65217 *tps;
      
1356. unsigned int val;
      
1357. int ret;
      
1358. mpu_dev= omap_device_get_by_hwmod_name("mpu");
      
1359. if (!mpu_dev)
      
1360.   pr_warning("%s: unable to get the mpu device\n",__func__);
      
1361. /* I2C1 adapter request */
      
1362. adapter = i2c_get_adapter(1);
      
1363. if (!adapter) {
      
1364.   pr_err("failed to get adapter i2c1\n");
      
1365.   return;
      
1366. }
      
1367. client= i2c_new_device(adapter,tps65217_i2c_boardinfo);
      
1368. if (!client)
      
1369.   pr_err("failed to register tps65217 to i2c1\n");
      
1370. i2c_put_adapter(adapter);
      
1371. tps =(struct tps65217 *)i2c_get_clientdata(client);
      
1372. ret =tps65217_reg_read(tps, TPS65217_REG_STATUS, &val);
      
1373. if (ret) {
      
1374.   pr_err("failed to read tps65217 status reg\n");
      
1375.   return;
      
1376. }
      
1377. if(!(val & TPS65217_STATUS_ACPWR)) {
      
1378.   /* If powered by USB then disable OPP120 and OPPTURBO */
      
1379.   pr_info("Maximum current provided by the USB port is500mA"
      
1380.    " which is not sufficient\nwhen operating @OPP120and"
      
1381.    " OPPTURBO. The current requirement forsome\nuse-cases"
      
1382.    " using OPP100 might also exceed the maximumcurrent"
      
1383.    " that the\nUSB port can provide. Unless you arefully"
      
1384.    " confident that the current\nrequirements forOPP100"
      
1385.    " use-case don't exceed the USB limits,switching\nto"
      
1386.    " AC power is recommended.\n");
      
1387.   opp_disable(mpu_dev, 600000000);
      
1388.   opp_disable(mpu_dev, 720000000);
      
1389. }
      
1390. }
      
1391. static voidmmc0_no_cd_init(int evm_id, int profile)
      
1392. {
      
1393. setup_pin_mux(mmc0_common_pin_mux);
      
1394. 
      
1395. omap2_hsmmc_init(am335x_mmc);
      
1396. return;
      
1397. }
      
1398. /* ConfigureGPIOs for GPIO Keys */
      
1399. static struct gpio_keys_button am335x_evm_gpio_buttons[] = {
      
1400. { //K1 --czx
      
1401.   .code                  = BTN_0,
      
1402.   .gpio                  = GPIO_TO_PIN(3, 14),
      
1403.   .desc                  = "SW1",
      
1404. },
      
1405. { //K2
      
1406.   .code                  = BTN_1,
      
1407.   .gpio                  = GPIO_TO_PIN(3, 15),
      
1408.   .desc                  = "SW2",
      
1409. },
      
1410. { //K3
      
1411.   .code                  = BTN_2,
      
1412.   .gpio                  = GPIO_TO_PIN(3, 16),
      
1413.   .desc                  = "SW3",
      
1414.   .wakeup                = 1,
      
1415. },
      
1416. { //K4
      
1417.   .code                  = BTN_3,
      
1418.   .gpio                  = GPIO_TO_PIN(3, 18),
      
1419.   .desc                  = "SW4",
      
1420. },
      
1421. };
      
1422. static structgpio_keys_platform_data am335x_evm_gpio_key_info = {
      
1423. .buttons        = am335x_evm_gpio_buttons,
      
1424. .nbuttons       =ARRAY_SIZE(am335x_evm_gpio_buttons),
      
1425. };
      
1426. static structplatform_device am335x_evm_gpio_keys = {
      
1427. .name   = "gpio-keys",
      
1428. .id     = -1,
      
1429. .dev    = {
      
1430.   .platform_data  = &am335x_evm_gpio_key_info,
      
1431. },
      
1432. };
      
1433. static voidgpio_keys_init(int evm_id, int profile)
      
1434. {
      
1435. int err;
      
1436. 
      
1437. pr_info("gpio_keys_init **********************************\n");
      
1438. 
      
1439. setup_pin_mux(gpio_keys_pin_mux);
      
1440. err = platform_device_register(&am335x_evm_gpio_keys);
      
1441. if (err)
      
1442.   pr_err("failed to register gpio key device\n");
      
1443. }
      
1444. static structgpio_led gpio_leds[] = {
      
1445. {
      
1446.   .name   = "am335x:EVM_SK:usr0",
      
1447.   .gpio   = GPIO_TO_PIN(1, 30), /* D1 */ //--czx
      
1448. },
      
1449. {
      
1450.   .name   = "am335x:EVM_SK:usr1",
      
1451.   .gpio   = GPIO_TO_PIN(1, 31), /* D2 */ //--czx
      
1452.   .default_trigger = "heartbeat",
      
1453. },
      
1454. };
      
1455. static structgpio_led_platform_data gpio_led_info = {
      
1456. .leds  = gpio_leds,
      
1457. .num_leds = ARRAY_SIZE(gpio_leds),
      
1458. };
      
1459. static structplatform_device leds_gpio = {
      
1460. .name = "leds-gpio",
      
1461. .id = -1,
      
1462. .dev = {
      
1463.   .platform_data = &gpio_led_info,
      
1464. },
      
1465. };
      
1466. static voidgpio_led_init(int evm_id, int profile)
      
1467. {
      
1468. int err;
      
1469. pr_info("gpio_led_init ********************************** \n");
      
1470. setup_pin_mux(gpio_led_mux);
      
1471. err = platform_device_register(&leds_gpio);
      
1472. if (err)
      
1473.   pr_err("failed to register gpio led device\n");
      
1474. }
      
1475. 
      
1476. static void profibus_init(intevm_id, int profile)
      
1477. {
      
1478. //setup_pin_mux(profibus_pin_mux);
      
1479. return;
      
1480. }
      
1481. static structomap_rtc_pdata am335x_rtc_info = {
      
1482. .pm_off  = false,
      
1483. .wakeup_capable = 0,
      
1484. };
      
1485. static voidam335x_rtc_init(int evm_id, int profile)
      
1486. {
      
1487. void __iomem *base;
      
1488. struct clk *clk;
      
1489. struct omap_hwmod *oh;
      
1490. struct platform_device *pdev;
      
1491. char *dev_name = "am33xx-rtc";
      
1492. clk =clk_get(NULL, "rtc_fck");
      
1493. if (IS_ERR(clk)) {
      
1494.   pr_err("rtc : Failed to get RTC clock\n");
      
1495.   return;
      
1496. }
      
1497. if(clk_enable(clk)) {
      
1498.   pr_err("rtc: Clock Enable Failed\n");
      
1499.   return;
      
1500. }
      
1501. base =ioremap(AM33XX_RTC_BASE, SZ_4K);
      
1502. if(WARN_ON(!base))
      
1503.   return;
      
1504. /*Unlock the rtc's registers */
      
1505. writel(0x83e70b13, base + 0x6c);
      
1506. writel(0x95a4f1e0, base + 0x70);
      
1507. /*
      
1508.   * Enable the 32K OSc
      
1509.   * TODO: Need a better way to handle this
      
1510.   * Since we want the clock to be running before mmc init
      
1511.   * we need to do it before the rtc probe happens
      
1512.   */
      
1513. writel(0x48, base + 0x54);
      
1514. iounmap(base);
      
1515. switch(evm_id) {
      
1516. case BEAGLE_BONE_A3:
      
1517. case BEAGLE_BONE_OLD:
      
1518.   am335x_rtc_info.pm_off = true;
      
1519.   break;
      
1520. default:
      
1521.   break;
      
1522. }
      
1523. clk_disable(clk);
      
1524. clk_put(clk);
      
1525. if(omap_rev() >= AM335X_REV_ES2_0)
      
1526.   am335x_rtc_info.wakeup_capable = 1;
      
1527. oh =omap_hwmod_lookup("rtc");
      
1528. if (!oh) {
      
1529.   pr_err("could not look up %s\n", "rtc");
      
1530.   return;
      
1531. }
      
1532. pdev =omap_device_build(dev_name, -1, oh, &am335x_rtc_info,
      
1533.    sizeof(struct omap_rtc_pdata), NULL, 0, 0);
      
1534. WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n",
      
1535.    dev_name, oh->name);
      
1536. }
      
1537. /* Enableclkout2 */
      
1538. static struct pinmux_config clkout2_pin_mux[] = {
      
1539. //{"xdma_event_intr1.clkout2", OMAP_MUX_MODE3 |AM33XX_PIN_OUTPUT},
      
1540. {NULL, 0},
      
1541. };
      
1542. static voidclkout2_enable(int evm_id, int profile)
      
1543. {
      
1544. struct clk *ck_32;
      
1545. ck_32 =clk_get(NULL, "clkout2_ck");
      
1546. if (IS_ERR(ck_32)) {
      
1547.   pr_err("Cannot clk_get ck_32\n");
      
1548.   return;
      
1549. }
      
1550. clk_enable(ck_32);
      
1551. setup_pin_mux(clkout2_pin_mux);
      
1552. }
      
1553. static voidsgx_init(int evm_id, int profile)
      
1554. {
      
1555. if (omap3_has_sgx()) {
      
1556.   am33xx_gpu_init();
      
1557. }
      
1558. }
      
1559. /* General Purpose EVM */
      
1560. /*static struct evm_dev_cfg gen_purp_evm_dev_cfg[] = {
      
1561. {am335x_rtc_init, DEV_ON_BASEBOARD, PROFILE_ALL},
      
1562. {clkout2_enable, DEV_ON_BASEBOARD, PROFILE_ALL},
      
1563. {enable_ecap0, DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_1 |
      
1564.       PROFILE_2 | PROFILE_7) },
      
1565. {lcdc_init, DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_1 |
      
1566.       PROFILE_2 | PROFILE_7) },
      
1567. {mfd_tscadc_init, DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_1 |
      
1568.       PROFILE_2 | PROFILE_7) },
      
1569. {rgmii1_init, DEV_ON_BASEBOARD, PROFILE_ALL},
      
1570. {rgmii2_init, DEV_ON_DGHTR_BRD, (PROFILE_1 | PROFILE_2 |
      
1571.       PROFILE_4 | PROFILE_6) },
      
1572. {usb0_init, DEV_ON_BASEBOARD, PROFILE_ALL},
      
1573. {usb1_init, DEV_ON_BASEBOARD, PROFILE_ALL},
      
1574. {evm_nand_init, DEV_ON_DGHTR_BRD,
      
1575.   (PROFILE_ALL & ~PROFILE_2 & ~PROFILE_3)},
      
1576. {i2c1_init,    DEV_ON_DGHTR_BRD, (PROFILE_ALL & ~PROFILE_2)},
      
1577. {lis331dlh_init, DEV_ON_DGHTR_BRD, (PROFILE_ALL & ~PROFILE_2)},
      
1578. {mcasp1_init, DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_3 |PROFILE_7)},
      
1579. {mmc1_init, DEV_ON_DGHTR_BRD, PROFILE_2},
      
1580. {mmc2_wl12xx_init, DEV_ON_BASEBOARD, (PROFILE_0 | PROFILE_3 |
      
1581.         PROFILE_5)},
      
1582. {mmc0_init, DEV_ON_BASEBOARD, (PROFILE_ALL & ~PROFILE_5)},
      
1583. {mmc0_no_cd_init, DEV_ON_BASEBOARD, PROFILE_5},
      
1584. {spi0_init, DEV_ON_DGHTR_BRD, PROFILE_2},
      
1585. {uart1_wl12xx_init, DEV_ON_BASEBOARD, (PROFILE_0 | PROFILE_3 |
      
1586.         PROFILE_5)},
      
1587. {wl12xx_init, DEV_ON_BASEBOARD, (PROFILE_0 | PROFILE_3 |PROFILE_5)},
      
1588. {d_can_init, DEV_ON_DGHTR_BRD, PROFILE_1},
      
1589. {matrix_keypad_init, DEV_ON_DGHTR_BRD, PROFILE_0},
      
1590. {volume_keys_init,  DEV_ON_DGHTR_BRD, PROFILE_0},
      
1591. {uart2_init, DEV_ON_DGHTR_BRD, PROFILE_3},
      
1592. {haptics_init, DEV_ON_DGHTR_BRD, (PROFILE_4)},
      
1593. {sgx_init, DEV_ON_BASEBOARD, PROFILE_ALL},
      
1594. {NULL, 0, 0},
      
1595. };
      
1596. */
      
1597. 
      
1598. /* EVM - Starter Kit */
      
1599. static struct evm_dev_cfg evm_sk_dev_cfg[] = {
      
1600. {am335x_rtc_init, DEV_ON_BASEBOARD, PROFILE_ALL},
      
1601. {evm_nand_init, DEV_ON_BASEBOARD, PROFILE_ALL},//--czx
      
1602. //{spi0_init, DEV_ON_DGHTR_BRD, PROFILE_2},//--czx
      
1603. {usb0_init, DEV_ON_BASEBOARD, PROFILE_ALL},//--czx
      
1604. {usb1_init, DEV_ON_BASEBOARD, PROFILE_ALL},//--czx
      
1605. {mmc0_init, DEV_ON_BASEBOARD, PROFILE_ALL},
      
1606. //{mmc1_init, DEV_ON_BASEBOARD, PROFILE_ALL},
      
1607. {rgmii1_init, DEV_ON_BASEBOARD, PROFILE_ALL},
      
1608. {rgmii2_init, DEV_ON_BASEBOARD, PROFILE_ALL},
      
1609. {lcdc_init,     DEV_ON_BASEBOARD, PROFILE_ALL},
      
1610. {enable_ecap0,     DEV_ON_BASEBOARD,PROFILE_ALL},//--lh
      
1611. {mfd_tscadc_init, DEV_ON_BASEBOARD, PROFILE_ALL},
      
1612. {gpio_keys_init,  DEV_ON_BASEBOARD, PROFILE_ALL},
      
1613. {gpio_led_init,  DEV_ON_BASEBOARD, PROFILE_ALL},
      
1614. //{lis331dlh_init, DEV_ON_BASEBOARD, PROFILE_ALL}, //--lh
      
1615. {mcasp1_init,   DEV_ON_BASEBOARD, PROFILE_ALL},
      
1616. {uart4_init,   DEV_ON_BASEBOARD, PROFILE_ALL},
      
1617. // {uart1_wl12xx_init, DEV_ON_BASEBOARD, PROFILE_ALL},
      
1618. // {wl12xx_init,       DEV_ON_BASEBOARD,PROFILE_ALL},
      
1619. //{gpio_ddr_vtt_enb_init, DEV_ON_BASEBOARD, PROFILE_ALL},
      
1620. {sgx_init,       DEV_ON_BASEBOARD,PROFILE_ALL},
      
1621. 
      
1622. {NULL, 0, 0},
      
1623. };
      
1624. static intam33xx_evm_tx_clk_dly_phy_fixup(struct phy_device *phydev)
      
1625. {
      
1626. phy_write(phydev, AR8051_PHY_DEBUG_ADDR_REG,
      
1627.     AR8051_DEBUG_RGMII_CLK_DLY_REG);
      
1628. phy_write(phydev, AR8051_PHY_DEBUG_DATA_REG, AR8051_RGMII_TX_CLK_DLY);
      
1629. return0;
      
1630. }
      
1631. #defineAM33XX_VDD_CORE_OPP50_UV  1100000
      
1632. #define AM33XX_OPP120_FREQ  600000000
      
1633. #define AM33XX_OPPTURBO_FREQ  720000000
      
1634. #define AM33XX_ES2_0_VDD_CORE_OPP50_UV 950000
      
1635. #define AM33XX_ES2_0_OPP120_FREQ 720000000
      
1636. #define AM33XX_ES2_0_OPPTURBO_FREQ 800000000
      
1637. #define AM33XX_ES2_0_OPPNITRO_FREQ 1000000000
      
1638. #defineAM33XX_ES2_1_VDD_CORE_OPP50_UV 950000
      
1639. #define AM33XX_ES2_1_OPP120_FREQ 720000000
      
1640. #define AM33XX_ES2_1_OPPTURBO_FREQ 800000000
      
1641. #define AM33XX_ES2_1_OPPNITRO_FREQ 1000000000
      
1642. static voidam335x_opp_update(void)
      
1643. {
      
1644. u32 rev;
      
1645. int voltage_uv = 0;
      
1646. struct device *core_dev, *mpu_dev;
      
1647. struct regulator *core_reg;
      
1648. core_dev= omap_device_get_by_hwmod_name("l3_main");
      
1649. mpu_dev = omap_device_get_by_hwmod_name("mpu");
      
1650. if(!mpu_dev || !core_dev) {
      
1651.   pr_err("%s: Aiee.. no mpu/core devices? %p %p\n",__func__,
      
1652.          mpu_dev, core_dev);
      
1653.   return;
      
1654. }
      
1655. core_reg= regulator_get(core_dev, "vdd_core");
      
1656. if (IS_ERR(core_reg)) {
      
1657.   pr_err("%s: unable to get core regulator\n", __func__);
      
1658.   return;
      
1659. }
      
1660. /*
      
1661.   * Ensure physical regulator is present.
      
1662.   * (e.g. could be dummy regulator.)
      
1663.   */
      
1664. voltage_uv = regulator_get_voltage(core_reg);
      
1665. if (voltage_uv < 0) {
      
1666.   pr_err("%s: physical regulator not present for core" \
      
1667.          "(%d)\n", __func__,voltage_uv);
      
1668.   regulator_put(core_reg);
      
1669.   return;
      
1670. }
      
1671. pr_debug("%s:core regulator value %d\n", __func__, voltage_uv);
      
1672. if (voltage_uv > 0) {
      
1673.   rev = omap_rev();
      
1674.   switch (rev) {
      
1675.   case AM335X_REV_ES1_0:
      
1676.    if (voltage_uv <= AM33XX_VDD_CORE_OPP50_UV) {
      
1677.     /*
      
1678.      * disable the higher freqs - we dont care about
      
1679.      * the results
      
1680.      */
      
1681.     opp_disable(mpu_dev, AM33XX_OPP120_FREQ);
      
1682.     opp_disable(mpu_dev, AM33XX_OPPTURBO_FREQ);
      
1683.    }
      
1684.    break;
      
1685.   case AM335X_REV_ES2_0:
      
1686.    if (voltage_uv <= AM33XX_ES2_0_VDD_CORE_OPP50_UV) {
      
1687.     /*
      
1688.      * disable the higher freqs - we dont care about
      
1689.      * the results
      
1690.      */
      
1691.     opp_disable(mpu_dev,
      
1692.          AM33XX_ES2_0_OPP120_FREQ);
      
1693.     opp_disable(mpu_dev,
      
1694.          AM33XX_ES2_0_OPPTURBO_FREQ);
      
1695.     opp_disable(mpu_dev,
      
1696.          AM33XX_ES2_0_OPPNITRO_FREQ);
      
1697.    }
      
1698.    break;
      
1699.   case AM335X_REV_ES2_1:
      
1700.   /* FALLTHROUGH */
      
1701.   default:
      
1702.    if (voltage_uv <= AM33XX_ES2_1_VDD_CORE_OPP50_UV) {
      
1703.     /*
      
1704.      * disable the higher freqs - we dont care about
      
1705.      * the results
      
1706.      */
      
1707.     opp_disable(mpu_dev,
      
1708.          AM33XX_ES2_1_OPP120_FREQ);
      
1709.     opp_disable(mpu_dev,
      
1710.          AM33XX_ES2_1_OPPTURBO_FREQ);
      
1711.     opp_disable(mpu_dev,
      
1712.          AM33XX_ES2_1_OPPNITRO_FREQ);
      
1713.    }
      
1714.    break;
      
1715.   }
      
1716. }
      
1717. }
      
1718. /*
      
1719. static void setup_general_purpose_evm(void)
      
1720. {
      
1721. u32 prof_sel = am335x_get_profile_selection();
      
1722. u32 boardid = GEN_PURP_EVM;
      
1723. 
      
1724. pr_info("setup_general_purpose_evm********************************** \n");
      
1725. 
      
1726. if (!strncmp("1.5A",config.version, 4))
      
1727.   boardid = GEN_PURP_DDR3_EVM;
      
1728. pr_info("Theboard is general purpose EVM %sin profile %d\n",
      
1729.    ((boardid == GEN_PURP_DDR3_EVM) ? "with DDR3 " :""),
      
1730.    prof_sel);
      
1731. _configure_device(boardid,gen_purp_evm_dev_cfg, (1L<< prof_sel));
      
1732. am33xx_cpsw_init(AM33XX_CPSW_MODE_RGMII,NULL, NULL);
      
1733. /* Atheros Tx Clk delay Phy fixup */
      
1734. /*phy_register_fixup_for_uid(AM335X_EVM_PHY_ID, AM335X_EVM_PHY_MASK,
      
1735.        am33xx_evm_tx_clk_dly_phy_fixup);
      
1736. }
      
1737. */
      
1738. /* EVM -Starter Kit */
      
1739. static void setup_starterkit(void)
      
1740. {
      
1741. pr_info("The board is a AM335x Starter Kit.\n");
      
1742. /*Starter Kit has Micro-SD slot which doesn't have Write Protect pin */
      
1743. am335x_mmc[0].gpio_wp = -EINVAL;
      
1744. _configure_device(EVM_SK,evm_sk_dev_cfg, PROFILE_NONE);
      
1745. 
      
1746. am33xx_cpsw_init(AM33XX_CPSW_MODE_RGMII, NULL, NULL);
      
1747. /* Atheros Tx Clk delay Phy fixup */
      
1748. phy_register_fixup_for_uid(AM335X_EVM_PHY_ID, AM335X_EVM_PHY_MASK,
      
1749.        am33xx_evm_tx_clk_dly_phy_fixup);
      
1750. }
      
1751. static voidam335x_setup_daughter_board(struct memory_accessor *m, void *c)
      
1752. {
      
1753. int ret;
      
1754. /*
      
1755.   * Read from the EEPROM to see the presence of daughter board.
      
1756.   * If present, print the cpld version.
      
1757.   */
      
1758. ret =m->read(m, (char *)&config1, 0, sizeof(config1));
      
1759. if (ret == sizeof(config1)) {
      
1760.   pr_info("Detected a daughter card on AM335x EVM..");
      
1761.   daughter_brd_detected = true;
      
1762. }
      
1763.   else {
      
1764.   pr_info("No daughter card found\n");
      
1765.   daughter_brd_detected = false;
      
1766.   return;
      
1767. }
      
1768. if(!strncmp("CPLD", config1.cpld_ver, 4))
      
1769.   pr_info("CPLD version: %s\n", config1.cpld_ver);
      
1770. else
      
1771.   pr_err("Unknown CPLD version found\n");
      
1772. }
      
1773. static voidam335x_evm_setup(struct memory_accessor *mem_acc, void *context)
      
1774. {
      
1775. int ret;
      
1776. char tmp[10];
      
1777. 
      
1778. pr_info("am335x_evm_setup **********************************\n");
      
1779.   
      
1780. /* 1st get the MAC address from EEPROM */
      
1781. am335x_mac_addr[0][0]= 0x00;
      
1782. am335x_mac_addr[0][1] = 0x22;
      
1783. am335x_mac_addr[0][2] = 0x15;
      
1784. am335x_mac_addr[0][3] = 0x00;
      
1785. am335x_mac_addr[0][4] = 0x00;
      
1786. am335x_mac_addr[0][5] = 0x01;
      
1787. 
      
1788. am335x_mac_addr[1][0] = 0x00;
      
1789. am335x_mac_addr[1][1] = 0x22;
      
1790. am335x_mac_addr[1][2] = 0x15;
      
1791. am335x_mac_addr[1][3] = 0x00;
      
1792. am335x_mac_addr[1][4] = 0x00;
      
1793. am335x_mac_addr[1][5] = 0x02;
      
1794. 
      
1795. am335x_mac_addr[2][0] = 0x00;
      
1796. am335x_mac_addr[2][1] = 0x22;
      
1797. am335x_mac_addr[2][2] = 0x15;
      
1798. am335x_mac_addr[2][3] = 0x00;
      
1799. am335x_mac_addr[2][4] = 0x00;
      
1800. am335x_mac_addr[2][5] = 0x02;
      
1801. /*Fillup global mac id */
      
1802. am33xx_cpsw_macidfillup(&am335x_mac_addr[0][0],
      
1803.     &am335x_mac_addr[1][0]);
      
1804. config.header= 0xEE3355AA;
      
1805. memcpy(config.name,"A335X_SK",8);
      
1806. memcpy(config.version,"V1.0",4);
      
1807. memcpy(config.opt,"SKU#01",6);
      
1808. snprintf(tmp,sizeof(config.name) + 1, "%s", config.name);
      
1809. pr_info("Board name: %s\n", tmp);
      
1810. snprintf(tmp, sizeof(config.version) + 1, "%s",config.version);
      
1811. pr_info("Board version: %s\n", tmp);
      
1812. daughter_brd_detected= false;
      
1813. setup_starterkit();  
      
1814. am335x_opp_update();
      
1815. /*
      
1816.   * For now, Beaglebone Black uses PG 2.0 that are speed binned andoperate
      
1817.   * up to 1GHz. So re-enable Turbo and Nitro modes,
      
1818.   */
      
1819. if (!strncmp("A335BNLT", config.name, 8)) {
      
1820.   struct device *mpu_dev;
      
1821.   mpu_dev= omap_device_get_by_hwmod_name("mpu");
      
1822.   opp_enable(mpu_dev,
      
1823.        AM33XX_ES2_0_OPPTURBO_FREQ);
      
1824.   opp_enable(mpu_dev,
      
1825.        AM33XX_ES2_0_OPPNITRO_FREQ);
      
1826. }
      
1827. /*SmartReflex also requires board information. */
      
1828. am33xx_sr_init();
      
1829. return;
      
1830. out:
      
1831. /*
      
1832.   * If the EEPROM hasn't been programed or an incorrect header
      
1833.   * or board name are read then the hardware details are unknown.
      
1834.   * Notify the user and call machine_halt to stop the boot process.
      
1835.   */
      
1836. pr_err("The error message above indicates that there is an issuewith\n"
      
1837.      "the EEPROM or the EEPROM contents.  Afterverifying the EEPROM\n"
      
1838.      "contents, if any, refer to the %s function inthe\n"
      
1839.      "%s file to modify the board\n"
      
1840.      "initialization code to match the hardwareconfiguration\n",
      
1841.      __func__ , __FILE__);
      
1842. machine_halt();
      
1843. }
      
1844. static structat24_platform_data am335x_daughter_board_eeprom_info = {
      
1845. .byte_len       = (256*1024) / 8,
      
1846. .page_size      = 64,
      
1847. .flags          =AT24_FLAG_ADDR16,
      
1848. .setup          =am335x_setup_daughter_board,
      
1849. .context        = (void *)NULL,
      
1850. };
      
1851. static structat24_platform_data am335x_baseboard_eeprom_info = {
      
1852. .byte_len       = (256*1024) / 8,
      
1853. .page_size      = 64,
      
1854. .flags          =AT24_FLAG_ADDR16,
      
1855. .setup          =am335x_evm_setup,
      
1856. .context        = (void *)NULL,
      
1857. };
      
1858. static structregulator_init_data am335x_dummy = {
      
1859. .constraints.always_on = true,
      
1860. };
      
1861. static structregulator_consumer_supply am335x_vdd1_supply[] = {
      
1862. REGULATOR_SUPPLY("vdd_mpu", NULL),
      
1863. };
      
1864. static structregulator_init_data am335x_vdd1 = {
      
1865. .constraints = {
      
1866.   .min_uV   = 600000,
      
1867.   .max_uV   = 1500000,
      
1868.   .valid_modes_mask = REGULATOR_MODE_NORMAL,
      
1869.   .valid_ops_mask  = REGULATOR_CHANGE_VOLTAGE,
      
1870.   .always_on  = 1,
      
1871. },
      
1872. .num_consumer_supplies = ARRAY_SIZE(am335x_vdd1_supply),
      
1873. .consumer_supplies = am335x_vdd1_supply,
      
1874. .ignore_check_consumers = 1,
      
1875. };
      
1876. static structregulator_consumer_supply am335x_vdd2_supply[] = {
      
1877. REGULATOR_SUPPLY("vdd_core", NULL),
      
1878. };
      
1879. static structregulator_init_data am335x_vdd2 = {
      
1880. .constraints = {
      
1881.   .min_uV   = 600000,
      
1882.   .max_uV   = 1500000,
      
1883.   .valid_modes_mask = REGULATOR_MODE_NORMAL,
      
1884.   .valid_ops_mask  = REGULATOR_CHANGE_VOLTAGE,
      
1885.   .always_on  = 1,
      
1886. },
      
1887. .num_consumer_supplies = ARRAY_SIZE(am335x_vdd2_supply),
      
1888. .consumer_supplies = am335x_vdd2_supply,
      
1889. .ignore_check_consumers = 1,
      
1890. };
      
1891. staticstruct tps65910_boardam335x_tps65910_info= {
      
1892. .tps65910_pmic_init_data[TPS65910_REG_VRTC] =&am335x_dummy,
      
1893. .tps65910_pmic_init_data[TPS65910_REG_VIO] =&am335x_dummy,
      
1894. .tps65910_pmic_init_data[TPS65910_REG_VDD1] =&am335x_vdd1,
      
1895. .tps65910_pmic_init_data[TPS65910_REG_VDD2] =&am335x_vdd2,
      
1896. .tps65910_pmic_init_data[TPS65910_REG_VDD3] =&am335x_dummy,
      
1897. .tps65910_pmic_init_data[TPS65910_REG_VDIG1] =&am335x_dummy,
      
1898. .tps65910_pmic_init_data[TPS65910_REG_VDIG2] =&am335x_dummy,
      
1899. .tps65910_pmic_init_data[TPS65910_REG_VPLL] =&am335x_dummy,
      
1900. .tps65910_pmic_init_data[TPS65910_REG_VDAC] =&am335x_dummy,
      
1901. .tps65910_pmic_init_data[TPS65910_REG_VAUX1] =&am335x_dummy,
      
1902. .tps65910_pmic_init_data[TPS65910_REG_VAUX2] =&am335x_dummy,
      
1903. .tps65910_pmic_init_data[TPS65910_REG_VAUX33] =&am335x_dummy,
      
1904. .tps65910_pmic_init_data[TPS65910_REG_VMMC] =&am335x_dummy,
      
1905. };
      
1906. /*
      
1907. * Daughter board Detection.
      
1908. * Every board has a ID memory (EEPROM) on board. We probe these devices at
      
1909. * machine init, starting from daughter board and ending with baseboard.
      
1910. * Assumptions :
      
1911. * 1. probe for i2c devicesare called in the order they are included in
      
1912. *    the below struct. Daughter boards eeprom are probed 1st.Baseboard
      
1913. *    eeprom probe is called last.
      
1914. */
      
1915. static struct i2c_board_info__initdata am335x_i2c0_boardinfo[]= {
      
1916. #if 1
      
1917. {
      
1918. /* Daughter Board EEPROM */
      
1919.   I2C_BOARD_INFO("24c256", DAUG_BOARD_I2C_ADDR),
      
1920.   .platform_data  = &am335x_daughter_board_eeprom_info,
      
1921. },
      
1922. {
      
1923.   /* Baseboard board EEPROM */
      
1924.   I2C_BOARD_INFO("24c256", BASEBOARD_I2C_ADDR),
      
1925.   .platform_data  = &am335x_baseboard_eeprom_info,
      
1926. },
      
1927. #endif
      
1928. /*{
      
1929.   I2C_BOARD_INFO("cpld_reg",0x35),
      
1930. },*/
      
1931. 
      
1932. {
      
1933.   I2C_BOARD_INFO("tps65910", TPS65910_I2C_ID1),
      
1934.   .platform_data  = &am335x_tps65910_info,
      
1935. },
      
1936. 
      
1937. {
      
1938.   I2C_BOARD_INFO("sgtl5000",0x0A),
      
1939.   
      
1940. },
      
1941. 
      
1942. 
      
1943. };
      
1944. static structomap_musb_board_data musb_board_data = {
      
1945. .interface_type = MUSB_INTERFACE_ULPI,
      
1946. /*
      
1947.   * mode[0:3] = USB0PORT's mode
      
1948.   * mode[4:7] = USB1PORT's mode
      
1949.   * AM335X beta EVM has USB0 inOTG mode and USB1 in hostmode.
      
1950.   */
      
1951. .mode           =(MUSB_HOST << 4) | MUSB_OTG,
      
1952. .power  = 500,
      
1953. .instances = 1,
      
1954. };
      
1955. static intcpld_reg_probe(struct i2c_client*client,
      
1956.      const struct i2c_device_id *id)
      
1957. {
      
1958. cpld_client = client;
      
1959. return 0;
      
1960. }
      
1961. static int__devexit cpld_reg_remove(struct i2c_client*client)
      
1962. {
      
1963. cpld_client = NULL;
      
1964. return 0;
      
1965. }
      
1966. static conststruct i2c_device_idcpld_reg_id[] = {
      
1967. { "cpld_reg", 0 },
      
1968. { }
      
1969. };
      
1970. static structi2c_driver cpld_reg_driver = {
      
1971. .driver = {
      
1972.   .name = "cpld_reg",
      
1973. },
      
1974. .probe  = cpld_reg_probe,
      
1975. .remove  = cpld_reg_remove,
      
1976. .id_table = cpld_reg_id,
      
1977. };
      
1978. static voidevm_init_cpld(void)
      
1979. {
      
1980. i2c_add_driver(&cpld_reg_driver);
      
1981. }
      
1982. static void__init am335x_evm_i2c_init(void)
      
1983. {
      
1984. /* Initially assume General Purpose EVM Config */
      
1985. am335x_evm_id = GEN_PURP_EVM;
      
1986. setup_pin_mux(i2c0_pin_mux);
      
1987. //evm_init_cpld();
      
1988. omap_register_i2c_bus(1, 100, am335x_i2c0_boardinfo,
      
1989.     ARRAY_SIZE(am335x_i2c0_boardinfo));
      
1990. }
      
1991. void __iomem*am33xx_emif_base;
      
1992. void __iomem* __init am33xx_get_mem_ctlr(void)
      
1993. {
      
1994. am33xx_emif_base= ioremap(AM33XX_EMIF0_BASE, SZ_32K);
      
1995. if(!am33xx_emif_base)
      
1996.   pr_warning("%s: Unable to map DDR2controller", __func__);
      
1997. returnam33xx_emif_base;
      
1998. }
      
1999. void __iomem*am33xx_get_ram_base(void)
      
2000. {
      
2001. return am33xx_emif_base;
      
2002. }
      
2003. void __iomem*am33xx_gpio0_base;
      
2004. void __iomem*am33xx_get_gpio0_base(void)
      
2005. {
      
2006. am33xx_gpio0_base = ioremap(AM33XX_GPIO0_BASE, SZ_4K);
      
2007. returnam33xx_gpio0_base;
      
2008. }
      
2009. static structresource am33xx_cpuidle_resources[] = {
      
2010. {
      
2011.   .start  = AM33XX_EMIF0_BASE,
      
2012.   .end  = AM33XX_EMIF0_BASE + SZ_32K - 1,
      
2013.   .flags  = IORESOURCE_MEM,
      
2014. },
      
2015. };
      
2016. /* AM33XXdevices support DDR2 power down */
      
2017. static struct am33xx_cpuidle_config am33xx_cpuidle_pdata = {
      
2018. .ddr2_pdown = 1,
      
2019. };
      
2020. static structplatform_device am33xx_cpuidle_device = {
      
2021. .name   = "cpuidle-am33xx",
      
2022. .num_resources  = ARRAY_SIZE(am33xx_cpuidle_resources),
      
2023. .resource  = am33xx_cpuidle_resources,
      
2024. .dev = {
      
2025.   .platform_data = &am33xx_cpuidle_pdata,
      
2026. },
      
2027. };
      
2028. static void__init am33xx_cpuidle_init(void)
      
2029. {
      
2030. int ret;
      
2031. am33xx_cpuidle_pdata.emif_base= am33xx_get_mem_ctlr();
      
2032. ret =platform_device_register(&am33xx_cpuidle_device);
      
2033. if(ret)
      
2034.   pr_warning("AM33XX cpuidle registration failed\n");
      
2035. }
      
2036. static void__init am335x_evm_init(void)
      
2037. {
      
2038. am33xx_cpuidle_init();
      
2039. am33xx_mux_init(board_mux);
      
2040. omap_serial_init();
      
2041. am335x_evm_i2c_init();
      
2042. omap_sdrc_init(NULL, NULL);
      
2043. usb_musb_init(&musb_board_data);
      
2044. omap_board_config = am335x_evm_config;
      
2045. omap_board_config_size = ARRAY_SIZE(am335x_evm_config);
      
2046. /* Create an alias for icss clock */
      
2047. if (clk_add_alias("pruss", NULL, "pruss_uart_gclk",NULL))
      
2048.   pr_warn("failed to create an alias: icss_uart_gclk -->pruss\n");
      
2049. /* Create an alias for gfx/sgx clock */
      
2050. if (clk_add_alias("sgx_ck", NULL, "gfx_fclk", NULL))
      
2051.   pr_warn("failed to create an alias: gfx_fclk -->sgx_ck\n");
      
2052. }
      
2053. static void__init am335x_evm_map_io(void)
      
2054. {
      
2055. omap2_set_globals_am33xx();
      
2056. omapam33xx_map_common_io();
      
2057. }
      
2058. MACHINE_START(AM335XEVM,"am335xevm")
      
2059. /* Maintainer: Texas Instruments */
      
2060. .atag_offset = 0x100,
      
2061. .map_io  = am335x_evm_map_io,
      
2062. .init_early = am33xx_init_early,
      
2063. .init_irq = ti81xx_init_irq,
      
2064. .handle_irq     = omap3_intc_handle_irq,
      
2065. .timer  = &omap3_am33xx_timer,
      
2066. .init_machine = am335x_evm_init,
      
2067. MACHINE_END
      
2068. MACHINE_START(AM335XIAEVM,"am335xiaevm")
      
2069. /* Maintainer: Texas Instruments */
      
2070. .atag_offset = 0x100,
      
2071. .map_io  = am335x_evm_map_io,
      
2072. .init_irq = ti81xx_init_irq,
      
2073. .init_early = am33xx_init_early,
      
2074. .timer  = &omap3_am33xx_timer,
      
2075. .init_machine = am335x_evm_init,
      
2076. MACHINE_END

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